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2017 was a year like no other in 40 years of SSD history. It was the best of times. It was the worst of times.
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2017 - adding new notes to the music of memory tiering

by Zsolt Kerekes, editor - November 14, 2017
I think that developments in the SSD and memory systems markets in 2017 will have as profound an effect on the future of the data systems market and the direction of its architecture and software as the adoption of flash SSDs in enterprise storage had on the design of hard disk arrays and the design of server motherboards.

Although many of the influences to this new fork in the road had been nurturing for several years before this for example:-
  • competing software solutions for memory tiering
  • the availability of 3 to 5 nvm alternatives to flash, and
  • mainstream market acceptance of solid state storage at the heart of enterprise storage engineering
it was the accidental convergence or crashing together of alt nvms as usable modules (in DIMMs, M.2 SSD and PCIe SSD form factors) in the same year as the statistically inevitable but accidental and unpredicted market force - the shortage of flash (with its attendant price hikes which had the effect of making alt-nvms look 2 -3 years better and more competitive than they had been in the all the years before) - which made the lasting difference. From here on thinking about the internal make up and external presentation of memory systems would be materially different.

new notes in the memory systems songbookAfter 2017 - memoryfication solutions (tiering at the board, box and cloud level) will no longer be restricted to the same old tunes restricted by the paucity of melodies obtainable from DRAM, flash and the intervening interface dynamics.

Designers can now count on a new set of notes and arrangements to provide data harmonies which were hitherto extravagant to realize with the two old mainstay memory technologies with their well understood limitations of space, power consumption and raw latency. (Although many pioneering attempts at breaking these memory opera barriers came with a supporting cast of batteries and extra cooling technologies hidden behind the stage curtain.)

While no one can guarantee that MRAM, ReRAM or 3DX / Optane will all continue to be available and competitive in multiple future generations - the continued future existence of any one particular alternative to flash and DRAM is less significant than the balance of probability that there are enough technologies out there (and coming in the works) to make it worthwhile for software and hardware designers to apply their minds to enriching the vocabulary of their architecture song books.

If I can use another analogy - 19th century chemists made great strides in their anticipation of all possible elements when they constructed the periodic table. For over a decade the SSD market (and its SSD product atoms) has been both enabled but also limited by the combination of building blocks which designers could construct with 2 distinct memory types - subject to the constraints of the atomic forces (price, wattage and ratios of capacity and latency between DRAM, flash and all rotating storage) which set the boundaries of which architectural permutations of components were viable at any point in time.

Looking ahead - the availability of new memories in the mix and the willingness of designers to leverage their features to create virtualizable benefits could be as significant to the datasystems market as the advent of additive technologies (3D printing) to the creation of new materials with characteristics which weren't imaginable with traditional elements and compounds.

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HyperBus adopted by JEDEC

Editor:- December 5, 2017 - Cypress Semiconductor today announced that its HyperBus low-pin-count memory interface has been included in the new eXpanded SPI interface standard from the JEDEC Solid State Technology Association.

Cypress provides a range of automotive qualified NOR flash "HyperFlash" and self-refresh DRAM "HyperRAM" product families.

See also:- interface glue chips, storage ORGs

Samsung's future flash price trends discussed by Morgan Stanley

Editor:- December 1, 2017 - A story on Bloomberg - Morgan Stanley Defends Downgrades of Asia Tech Titans after Rout follows the reaction to an earlier analyst report by Morgan Stanley which downgraded prospects for Samsung due to the inevitability of corrections in the memory market and anticipated price reductions.

Among other things the earlier report said - "We see downside risk as NAND prices have started to reverse in 4Q17. Meanwhile, visibility on DRAM supply-demand dynamics has reduced beyond 1Q18."

The later Bloomberg article says - "Everyone knows NAND prices will fall..."

Editor's comments:- comments from market researchers are loved by the objects of their analysis when they result in a positive market reaction. And are less well liked when the stories dent their share price. In a 2012 spoof article about one of the SSD heavyweights of that period I discussed this syndrome and said - "If an SSD company is worth about the same on a Friday as it was on the Monday - that's taken as a sign that everything's going as planned."

Everspin says it will make current STT-MRAM generation more competitive

Editor:- November 15, 2017 - A story on says that Everspin has decided to delay the introduction of its 1Gb STT-MRAM devices and instead focus on its 256Mb chips which are already in production.

In Everspin's recently announced financial results press release the company's CEO said the company is progressing from being "a developer of innovative MRAM technology into one that can develop markets, scale operations and reduce costs to compete..."

PCIe SSDs (enterprise and notebook M.2) did well in Q3

Editor:- November 15, 2017 - TrendFocus today published SSD market shipment data for Q3 2017.

Only one segment, enterprise PCIe, saw unit growth where every other segment – client drive format factor, client modules, enterprise SATA and enterprise SAS, all declined from the prior quarter.

Trendfocus SSD report Q3 2017The enterprise SSDs market declined 7% Q-Q, which includes SATA, SAS and PCIe. The bright spot within this overall decline was the healthy 15.6% increase in PCIe units. As hyperscale companies continue to migrate away from SATA, PCIe should continue to grow in both units and exabytes. SATA, still the highest volume of all enterprise categories, managed to stay just above 4 million units shipped but did decline sharply in CQ3. However, exabytes shipped in the SATA SSD market grew due to the transition to higher capacity units. SAS SSDs now represent the lowest unit volume of the enterprise SSD segments, but still maintain a large lead in average capacity shipped at over 2.1 terabytes.

Client SSD shipments fell 4.5% sequentially but exabytes shipped was flat. Client modules now represent almost 2/3 of all client SSDs shipped. Even more impressive within this segment is that M.2 PCIe is now 50% of this segment – illustrating the continued migration for major Notebook OEMs to integrate with this interface.

3D NAND accounted for more than 50% of all bits shipped for the first time in CQ3, as all of the NAND suppliers are well into the transition.

adding new notes to the music of memory tiering

Editor:- November 14, 2017 - If you're wondering why I haven't written much about the SSD market in recent weeks the simple answer is - I moved house.

Did I forget to pack the internet? You may ask.

It's strange how even the simplest of things which you take for granted in your old house are actually because of layers of past efforts which you've forgotten.

In the new house simple things like - let's get some heat - lead to - the control knob breaks off in my hand. Let's see what happen when I press this light switch - trips the whole house. And the range cooker is an ornament which no one within 100 miles wants to fix. (OK I was prepared for some of this and have Yellowstone camping stoves, logs for the fire, my legacy just- in-case-they're-right about Y2K Honda low noise electricity generator etc.)

Did I really forget to pack the internet?

I could say - yeah it was in a box - but there were about 100 other boxes in the way. But really I just needed a rest.

Part of the plan in moving (is it really only 200 yards? - yes - it's the very next house along the lane where I lived before - there are many nice things around here which look familiar - and wonderful neighbors too) - was to free up more time for writing. I mean writing for the next 10 years - not the first 10 days. Few strategic changes are entirely bumpless. Anyway I've still got many boxes to open.

In my time offline I got to thinking about the past year and past decade. (You know the sort of thing.) And the future too.

So I scribbled some notes - 2017 - adding new notes to the music of memory tiering - a new article in the sidebar at the left.

Thanks for your patience.

IntelliProp demonstrates Gen-Z memory controller

Editor:- November 13, 2017 - IntelliProp today announced demonstrations of 2 new controller IPs.
  • A memory controller for the emerging Gen-Z memory interface.

    IntelliProp's Gen-Z IPA-PM185-CT "COBRA" controller combines DRAM and NAND and sits on the Gen-Z fabric, not the memory bus. COBRA has the ability to support byte addressability to DRAM cache and Block addressability to NAND flash. COBRA-based Gen-Z memory modules provide low latency, persistent, shared memory access to multiple processors and accelerators on the Gen-Z fabric supporting up to 32GB of DRAM and 3TB of NAND.
  • An NVMe 1.3 compatible host accelerator IP core.

    IntelliProp's IPC-NV164-HI for for Xilinx and Altera FPGAs accelerates performance by off-loading command and completion queue management from the processor to hardware.

Enmotus tiers NVDIMMs with NVMe flash at SC17

Editor:- November 13, 2017 - Enmotus today announced it is demonstrating a fully automated tiered volume with 2 million IOPS performance using NVDIMMs and NVMe flash technology from Micron at the SC17 Conference being held this week in Denver, Colorado.

"Enmotus' FuzeDrive Virtual SSD Software combines the NVDIMMs and NVMe flash into a single, fully automated virtual volume," said Andy Mills, CEO of Enmotus. "The software identifies the active data set of applications, and dynamically allocates the appropriate storage resources to optimize performance."

Qualcomm invests in Excelero

Editor:- November 7, 2017 - Excelero today announced a strategic investment from Qualcomm Ventures which brings the total of VC funds invested in Excelero to $30 million.

"NVMe SSDs and innovations like 3DXpoint need new scale-out architectures so that IT teams can consolidate resources enterprise-wide into flexible and reliable infrastructures, without compromise," said Lior Gal, CEO and co-founder of Excelero. "We're proud to receive the ultimate vote of confidence from esteemed strategic investors such as Qualcomm Ventures – leaders who are driving innovation in data center technologies. We look forward to building out our offering and helping enterprises to deploy the hyperscale data center of tomorrow."

SSD software, VC funds in SSD, after AFAs - what's the next box?

AccelStor doesn't use capacitor holdup to boost new HA arrays

Editor:- November 6, 2017 - The complex interdependencies between capacitor hold up time on RAM flash caches and performance and reliability in SSDs has been discussed many times in

In an announcement today about its new 2U flash array for the high availability market - the H510 (pdf) (array of 24 SATA SSDs with 8x 10GbE SFP+ or 4x 16G FC connectivity) - AccelStor said this...

"Some vendors adopt NVRAM as a write cache and use supercapacitors to provide energy to write the RAM content into flash in the event of a power failure. However, supercapacitors can still cause a single point of failure. AccelStor aims to provide comprehensive data protection. With the special write-through design, its NeoSapphire AFAs acknowledge the completion of incoming I/O only when 100% of the data has been written on the SSD."

AccelStor became known for their high performance arrays for the performance optimized market. The new H510 also includes data security features including cryptographic erase.

Many flash arrays includes some kind of performance hit during software upgrades and maintenance. Accelstor says its shared nothing architecture requires no maintenance window. "You can simply perform the maintenance on a single node while receiving the full performance and capabilities of the secondary node."

Editor's comments:- I wrote about Accelstor's thinking about the use of NVMs and arrays failover gotchas in an interview article last year.
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SSD news in Decembers of yore
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December 2013 LSI announced that it had agreed to be acquired by Avago Technologies for $6.6 billion.
December 2014 Western Digital acquired Skyera (which at that time was offering the highest capacity SSD racks based on its own efficient controller architecture and software).
December 2015 NxGn Data was awared a research grant by the National Science Foundation to advance its prototype development in the new computing tier of in-situ SSD processing.
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Are we there yet?
After more than 20 years of writing guides to the SSD and memory systems market I admit in a new blog on - Are we there yet? - that when I come to think about it candidly the SSD industry and my publishing output are both still very much "under construction". the article

If you're one of those who has suffered from the memory shortages it may seem unfair that despite their miscalculations and over optimimism the very companies which caused the shortages of memory and higher prices - the major manufacturers of nand flash and DRAM - have been among the greatest beneficiaries.
consequences of the 2017 memory shortages

AccelStor NeoSapphire  all-flash array
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InfiniBand or 10GbE iSCSI or 16G FC
NeoSapphire series - from AccelStor

The industry will learn a lot about the "goodness" of new memory tiering products by stressing them in ways which the original designers never intended.
RAM disk emulations in "flash as RAM" solutions

after AFAs? - the next box
Throughout the history of the data storage market we've always expected the capacity of enterprise user memory systems to be much smaller than the capacity of all the other attached storage in the same data processing environment.

after AFAs - click to read rhe articleA new blog on - cloud adapted memory systems - asks (among other things) if this will always be true.

Like many of you - I've been thinking a lot about the evolution of memory technologies and data architectures in the past year. I wasn't sure when would be the best time to share my thoughts about this one. But the timing seems right now. the article

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