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which way next for SSD?

by Zsolt Kerekes, editor - December 1, 2017
It was the best of times.

It was the worst of times. Megabyte's December 2017 blog

2017 was a year like no other in 40 years of SSD history.

The trajectory of SSD market's onward rebound from memory shortages will be directed by existential questions.

For the first time since the modern era of SSDs (the no-turning-back years since 2003) the approximate number of SSDs shipped didn't rise substantially and instead remained essentially flat year on year.

The most obvious cause for SSD shipments flatlining seemed to be the much written about memory shortages.

Memory chip shipments in 2017 were reported by market researchers to have been about the same or less than in 2016 due to worse than expected manufacturing yield problems associated with next generation memories. This was exacerbated by the impossibility of bringing new production capacity in place fast enough due to long lead times of production equipment and prohibitive investment risks.

While it's true that SSDs shipped in 2017 were on average bigger in capacity than in earlier years this was little consolation to those SSD vendors whose growth ambitions - if they didn't own wafer fabs - were shredded by circumstances seemingly outside anyone's control.

Stories from SSD companies coupled with rising memory and SSD prices gave credence to the notion that user demand for SSDs would have increased had supplies been available. Had user appetites for SSDs and memory been satisfied then prices would have fallen rather than risen and in that case the interpretation of shipment data would have led to a different market prognosis.

But don't expect business to pick up where it left off when the next memory boom bust correction kicks in. I think there are other factors already at work which point towards the shape of future SSD shipments being materially different in 2018 and 2019.

At the root of this are revisits to fundamental questions:-
  • what should memory systems should do?

    For example should in memory processing be part of the standard feature set?
  • what they should memory systems look like?

    In addition to the obvious form factor and interface issues which attached to DIMM wars and memory fabrics - another question is - should future memory arrays be optimized as storage systems which can emulate memory? or as memory systems which provide backwards emulation of legacy storage?
  • to what extent should new memory systems be compatible with past software investments?

    Or - given the market's recent willingness to engage with memory systems as the only way to advance affordable computer boundaries - should the market aim higher? Should the opportunities (of performance and cost) enabled by new memory system architectures change the shape of the very processors and software they are intended to work with?
You might say - why worry? As we've seen with the great solid state storage experiment it takes years to roll out new architectural dice and the winning patterns can't exert a backwards influence.

I would argue however that long before the truly revolutionary changes in memory systems architecture are stabilized we are already seeing new influences coming from pragmatic adaptations of currently shipping memory products (like NVDIMMs and SoC compatible nvms) which - with the right software - have the ability to change the ratios of other SSDs, memory and storage in the systems in which they appear.

These incremental technologies will change the patterns of use of memory in every kind of computing product.

Many SSD designers in the past decade have been nibbling away at issues of SSD efficiency - answering the crude question - what's the best way to use any given number of memory chips and if I can change the way they connect and the software. These improvements have typically accumulated in chunks from as small as 5% to as big as 50% in a single design feature (or patentable IP). As long ago as 2013 I hinted at the tremendous gap between where we had got to compared to what may be possible in my classic impacts of the SSD software event horizon. Recently heralded companies like Symbolic IO claim that they do can even better.

The new reality is that DRAM and flash are no longer the only defining memory types supported by useful software.

So called "emerging memories" - some of which had gotten to be teenagers before they quit their dark dens and emerged as data industry citizens - have this year been at the heart of claims by systems oriented memoryfication startups that they could change the world of storage and memory arrays arrays as much as SSDs changed the landscape before.

In April 2017 on this very home page - I asked the question - Are we there yet? - 23 years of SSD guides later... I concluded at that time the memory systems market and this publisher are still "under construction". Now with the benefit of hindsight it seems I was right.

Underlying the shaping of the SSD market's future I think we must anticipate bigger changes to come in the next few years.
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the need for new processing/storage architectures
Editor:- December 12, 2017 - NGD Systems (formerly called NxGn Data) today published the results of a survey on the need for Intelligence storage for applications with large data sets.

The purpose of the study was to gauge whether the movement of large data sets across existing processing and storage architectures negatively impacts the cost and usability of the data by applications.

The results of the survey - Smart Storage Survey Report (pdf) - conducted by G2M Research for NGD - show that existing compute and storage architectures adversely impact the performance and cost of these applications, and that new architectures are needed if these applications are to continue to scale in size and capabilities.

NGD has been a pioneer of in-situ processing and their current approach is to leverage ARM processing cores within the SSD controller (although other types of implementation and tiering within the memory/ storage assets have been reported in these news pages from other researchers and developers).

Among other things the survey report says...

"Since the advent of digital computers, the IT industry has regularly oscillated between convergence and disaggregation, as well as how specific functionality has been packaged and delivered to those who use it. The movement of processing capabilities into storage media, as represented by in-situ processing in SSDs, represents a new evolutionary path in IT that has been made possible by the solid-state nature of SSDs." the article pdf)

Editor's comments:- 3 years ago I listed "in-situ SSD processing" as #1 of the 12 key SSD ideas which changed in 2014.

The implementations of this new architectural idea has had to adapt pragmatically to changes in the SSD market - notably the emergence of standards like NVMe and associated fabrics - but also to other technologies which have been introduced to enable memory systems to work better such as NVDIMMs, tiering software and rethinking the relative size and roles of memory compared to local storage (cloud adapted memory architecture).
2017 in the SSD news archives
December 2017 Diablo Technologies ceased operations and filed for bankruptcy.
November 2017 IntelliProp demonstrated a memory controller for the emerging Gen-Z memory fabric.
October 2017 Infinidat announced a $95 million funding round round.
September 2017 Toshiba announced the winner of the $18 billion beauty pageant to find a suitable buyer for its memory and SSD business.
August 2017 Western Digital agreed to acquire Tegile which had pioneered innovative "utility" based customer pricing models in the hybrid storage array market.
July 2017 Viking shipped 50TB planar MLC 3.5" SAS SSDs based on a controller platform designed by rackmount SSD maker Nimbus.

Micron's Inotera fab scrapped 60,000 wafers - equivalent to 1 month of worldwide 3D nand flash wafer starts.
June 2017 Toshiba began sampling the world's first 64 layer QLC (x4) nand flash memory. The 768Gb chips were the highest density nvms available.
May 2017 Micron enters the rackmount SSD market.

Everspin's MRAM exits emerging status.
April 2017 IP-Maker released NVMe FPGA IP to enable use of enterprise performance SSDs in low wattage "no CPU" embedded systems.

Rambus said it was working with Microsoft on the design of prototype super cooled DRAM systems to explore avenues of improvement in latency and density due to physics effects below -180 C.
March 2017 Excelero - emerged from stealth.

Everspin began sampling an NVMe PCIe SSD based on its ST-MRAM.

Intel began sampling an NVMe PCIe SSD based on Micron's 3DXpoint memory.
February 2017 Tachyum emerged from stealth mode
January 2017 Pure Storage said the "new stack" is becoming the standard thing.

Crossbar announced it was sampling 8Mb ReRAM based on 40nm CMOS friendly technology.

All the marketing noise coming from the DIMM wars market (flash as RAM and Optane etc) obscures some important underlying strategic and philosophical questions about the future of SSD.
where are we heading with memory intensive systems?


SSD symmetries article
SSD symmetries ..
custom SSDs
SSD customization ..
RAM image - click for RAM directory, articles and news
RAM really? ..
image shows mouse dangling from broken link - click for  storage reliability articles and news
storage reliability ...

SSD news - December 2017

more pages like this?
Regulators will look at competition in memory - says China Daily
Editor:- December 28, 2017 - China's NDRC (the business standards regulator similar in scope to the SEC in the US, and the EU in Europe) will be looking at competition in the semiconductor memory market prompted by complaints about shortages and high prices from mobile phone makers according to an article in which says among other things...

"The commission has spoken to Samsung, the world's largest storage chip manufacturer, but has yet to launch an official antitrust review process targeting the company..." the article

UMC offers 40nm SuperFlash from SST

Editor:- December 21, 2017 - UMC (a leading semiconductor foundry) today announced the availability of the company's 40nm process platform that incorporates SST's embedded SuperFlash non-volatile memory.

The newly available 40nm SST process features a >20% reduction in eFlash cell size and 20-30% macro area over UMC's mass production 55nm SST technology.

Editor's comments:- for many of you who don't struggle with the temperature constraints of real electronics systems you might glance at "40nm" and think - what's so great about that? When 1Xnm has been the flag waving geometry for nand flash for some time.

SuperFlash is NOR. And UMC says its robust SST process performs according to JEDEC standards, with 100k endurance and more than 10 years of data retention at 85C and an operating-temperature range of -40C to 125C.

See also:- military SSDs
optimizing CPUs for use with SSDs
this is not your Grandfather's industrial SSD market

IDC expects SSD revenue to reach $33 billion in 2021

Editor:- December 20, 2017 - IDC today announced - "The outlook for the SSD industry remains strong as units, revenue, and total capacity shipped are all expected to see robust growth throughout the 2016-2021 forecast period. In a new SSD forecast update IDC now expects worldwide SSD unit shipments to increase at a 5 year CAGR of 15.1%. SSD industry revenue is expected to reach $33.6 billion in 2021."

See also:- more market research

Samsung improves 10nm DRAM speed and yield

Editor:- December 20, 2017 - Samsung today announced today that it has begun mass producing the industry's first 2nd-generation (faster) 10nm class 8Gb DDR4 DRAM. This has been accomplished using legacy fab processing without needing yet the recourse of next generation EUV .

Re data integrity:- Samsung says a newly devised data sensing system enables a more accurate determination of the data stored in each cell, which leads to a significant increase in the level of circuit integration and manufacturing productivity.

Re industry memory shortages:- Samsung's new 10nm DDR4 features an approximate 30% productivity gain over the company's 1st–generation 10nm-class 8Gb DDR4.

Editor's comments:- as always there are a wide range of memory geometries being used in the market in various ages of legacy fabs.

But to set the context on 10nm DRAM here are 2 competitive comparisons from some smaller competitors in the high capacity DRAM market.
  • Taiwan based Nanya - recently announced production shipments of its own "independently-developed" 20nm process 8GB DDR-4 DRAM.

Toshiba samples subtly different SAS hard drives

Editor:- December 19, 2017 - I thought this was a joke at first. But it's for real. Toshiba today announced it is sampling the AL15SE - a 2.5" SAS HDD with 10,500 RPM spin speed.

This is the first time there has been a new spin speed since the 1990s although it falls between the previous two fastest bands.

Now I guess that rotating storage reliability experts can start worrying about whether the new frequency drives will create subtle reliability reducing resonances if they are mixed in the cabinet with other frequencies.

Seriously though - the combination of 12Gbs SAS in the new hard drives and the almost imperceptible improvement in latency (hard to notice when it's so slow compare to SSDs) shows that the storage industry which has been desperately seeking more SSDs than it could get or afford in 2017 has become receptive to any new nuanced device which can store data in an array better than what came before.

See also:- HDD articles & news from the home page of SSDs...

in memoriam Diablo

Editor:- December 15, 2017 - Diablo Technologies has filed for bankruptcy. More details can be seen in - Ottawa-based Diablo Technologies files for bankruptcy - in the Ottawa Business Journal.

There had been earlier signs that the company had ceased operations.

A story in the Register - Lights out at Diablo as plug pulled on website - noted a series of key personnel departures and a recent statement by the company's legal counsel consistent with the white space now on the company's home page and Diablo's non appearance at FMS in August.

Editor's comments:- Here's what I said today to a reader who asked my views about the fading away of Diablo Technologies.

My interpretation of Memory1 benchmarks (some of which were done by Diablo's own customers) is that with some workloads you would get substantial performance benefits (compared to assembling the same memory size with multiple DRAM based servers). But – it was clear – even in Diablo's own published benchmarks that with small data sets the performance was slightly worse (than without Memory1). So as a user you had to be very clear to size the system in an appropriate way. And clever enough to do it.

But more critically to the business case - I think investors must have thought that if the company can't make buckets of money at a time of memory shortage and high raw DRAM prices – then there would never be a better opportunity.

Competitor Netlist had shrewdly insulated itself from the cost of the next round of legal battles. And the years of uncertainty in the earlier rounds must have deterred many design wins.

The memoryfication market – with tiered enterprise memory – now has so many competitors and so many form factors that no one can be guaranteed to get a sizable chunk of it with any single product. It's really a fragmented market in which there are many ways to get similar results using entirely different mixes of technology at the server, box and infrastructure levels. Sad outcome really.

Diablo's Memory1 was a bold offering. And the industry is better for having been pushed towards considering memory tiering at the sub microsecond level and the attendant needs of software stacks and hardware - sooner - because of Diablo's efforts than it might otherwise have done.

One way to interpret the ill preparedness and rush to hype of Intel/Micron's unready Optane (née 3DXpoint) in 2015 was as a panic response to the outbreak of DIMM wars flashed over by rumors of Diablo's Memory1.

See also:- Memory Channel Storage SSDs - 2013 to 2017

Nanya presents overview of the memory market

Editor:- December 14, 2017 - An overview of the $120B (in 2017) memory market - which consolidates data from various market research sources appears in a Presentation to Analysts and Investors (pdf) - published today by Nanya Technology .

In 2017 worldwide revenue of DRAM was approx $69B - up 67% YoY.

In 2018 worldwide wafer starts for DRAM will increase moderately to 1,210K/month.

DRAM wafer starts

Toshiba and Western Digital bury the hatchet over flash

Editor:- December 13, 2017 - Toshiba and Western Digital today announced a global settlement agreement to resolve their ongoing disputes in litigation and arbitration, strengthen and extend their relationship, and enhance the mutual commitment to their ongoing flash memory collaboration.

The parties' agreement to resolve all outstanding disputes ensures that all parties are aligned on Toshiba's sale of TMC to K.K. Pangea, a special purpose acquisition company formed and controlled by a consortium led by Bain Capital Private Equity, LP ("Bain Capital"). The parties have agreed on mutual protections for their assets and confidential information in connection with the sale of TMC, and on collaborating to ensure the future success of TMC as a public company following an eventual IPO.

salami slicing Toshiba's SSD beauty pageant - timeline of stories

will increased fab capex secure future memory dominance?

Editor:- December 12, 2017 - In his recent article - Samsung's $26 billion bet (on ZDNet) - Robin Harris says this capital expenditure on semiconductor production facilities by the company which produces half the world's DRAM and flash memory ups the ante for competitors. the article

AFA market revenue grew to $1.6B in 3Q17 - says Dell'Oro

Editor:- December 6, 2017 - "AFA market revenue grew 33% yoy in 3Q17, reaching $1.6 Billion" according to a new report - Storage Systems Quarterly - published by Dell'Oro Group.

"All Flash Array is a very important technology segment in external storage. In fact, as a percentage of external storage revenue, it has been growing dramatically—from 22% in 3Q16 to 28% in 3Q17. So every vendor is determined to expand their position in all-flash storage systems" said Jimmy Yu, VP at Dell'Oro Group.

Editor's comments:- Dell'Oro's press release lists the 5 biggest vendors and the company can provide more analytical data in their purchaseable reports.

HyperBus adopted by JEDEC

Editor:- December 5, 2017 - Cypress Semiconductor today announced that its HyperBus low-pin-count memory interface has been included in the new eXpanded SPI interface standard from the JEDEC Solid State Technology Association.

Cypress provides a range of automotive qualified NOR flash "HyperFlash" and self-refresh DRAM "HyperRAM" product families.

See also:- interface glue chips, storage ORGs

Samsung's future flash price trends discussed by Morgan Stanley

Editor:- December 1, 2017 - A story on Bloomberg - Morgan Stanley Defends Downgrades of Asia Tech Titans after Rout follows the reaction to an earlier analyst report by Morgan Stanley which downgraded prospects for Samsung due to the inevitability of corrections in the memory market and anticipated price reductions.

Among other things the earlier report said - "We see downside risk as NAND prices have started to reverse in 4Q17. Meanwhile, visibility on DRAM supply-demand dynamics has reduced beyond 1Q18."

The later Bloomberg article says - "Everyone knows NAND prices will fall..."

Editor's comments:- comments from market researchers are loved by the objects of their analysis when they result in a positive market reaction. And are less well liked when the stories dent their share price. In a 2012 spoof article about one of the SSD heavyweights of that period I discussed this syndrome and said - "If an SSD company is worth about the same on a Friday as it was on the Monday - that's taken as a sign that everything's going as planned."
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tradeoffs in the design of mixed flash hybrid SSDs
Editor:- December 20, 2017 - This month I received a copy of a new (to me) paper - a Survey of Techniques for Architecting SLC/MLC/TLC Hybrid Flash Memory based SSDs (27 pages pdf) - from Sparsh Mittal, Assistant Professor at Indian Institute of Technology Hyderabad who is among the co-authors of this significant reference document.

Re the scope - the authors say "For sake of a concise presentation, we limit the scope of this paper as follows. We focus on software-level management techniques for hybrid SSDs and not their circuit-level design issues. We include techniques which use at least two types of Flash and not those that merely use an SCM with a Flash cell-type.We focus on the key ideas of each work and include only selected quantitative results, since different works use disparate evaluation platforms and workloads. We hope that this paper will be useful for computer architects, SSD designers and researchers in the area of storage architectures."

Among other things the paper discusses a wide range of externally referenced techniques including:-
  • tradeoffs in using some portion of TLC or MLC as virtual SLC (to improve latency and endurance)
  • reliability and performance tradeoffs using volatile versus non volatile RAM in buffers
  • revitalizing worn MLC blocks as SLC
  • varying the size of SLC designated buffers based on analyzing application usage to optimize garbage collection
The authors note various factors which are changing or need to change compared to previous generations of SSD design.
  • better runtime adaptation of control parameters
  • the need for hybrid SSD specific simulators
  • fairness and QoS (quality of service) joining the formula of design goals in SSD design in addition to the traditional must-haves of performance and reliability
If you've ever wondered about how to optimize SSD design by using a mix of flash memory types in the same SSD then this paper is an invaluable reference guide to the techniques which have been written about in the public domain. the article (pdf)

hybrid drives, SSD controllers
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"Almost all modern computers, and future AI machines in particular, will be defined by their power requirements. - Tell me your energy budget and I can tell you pretty accurately how much computing you're going to be able to get done..."
Dave Ditzel, President and CEO at Esperanto Technologies (RISC CPU company) in the article - Esperanto Intends to Create the World's Best AI Processor - in (December 13, 2017).

See also:- SPARC history
optimizing CPUs for use with SSDs

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SSD news in Decembers of yore
December 2001 Platypus Technology announced a channel strategy for its high-performance RAM SSD accelerator systems to "free applications from the I/O bottlenecks caused by hard drive-based storage, allowing mission critical files to run from silicon, rather than from rotating platters."
December 2005 Fusion-io was founded.
December 2007 SSD Alliance is founded to develop compatibility standards for flash SSDs.
December 2011 Apple acquired Anobit (a pioneer in the adaptive DSP ECC flash controller market) for a sum thought to be in the range $400 to $500 million.
December 2012 BiTMICRO began making PCIe SSDs using its Talino SSD controllers
December 2013 LSI announced that it had agreed to be acquired by Avago Technologies for $6.6 billion.
December 2014 Western Digital acquired Skyera (which at that time was offering the highest capacity SSD racks based on its own efficient controller architecture and software).
December 2015 NxGn Data was awared a research grant by the National Science Foundation to advance its prototype development in the new computing tier of in-situ SSD processing.
December 2016 Nantero announced a $21 million funding round for its carbon nanotube based NRAM.

Are we there yet?
After more than 20 years of writing guides to the SSD and memory systems market I admit in a new blog on - Are we there yet? - that when I come to think about it candidly the SSD industry and my publishing output are both still very much "under construction". the article

If you're one of those who has suffered from the memory shortages it may seem unfair that despite their miscalculations and over optimimism the very companies which caused the shortages of memory and higher prices - the major manufacturers of nand flash and DRAM - have been among the greatest beneficiaries.
consequences of the 2017 memory shortages

The industry will learn a lot about the "goodness" of new memory tiering products by stressing them in ways which the original designers never intended.
RAM disk emulations in "flash as RAM" solutions


after AFAs? - the next box
Throughout the history of the data storage market we've always expected the capacity of enterprise user memory systems to be much smaller than the capacity of all the other attached storage in the same data processing environment.

after AFAs - click to read rhe articleA new blog on - cloud adapted memory systems - asks (among other things) if this will always be true.

Like many of you - I've been thinking a lot about the evolution of memory technologies and data architectures in the past year. I wasn't sure when would be the best time to share my thoughts about this one. But the timing seems right now. the article