|
| Micron
samples auto-market endurance compliant mSATA SSDs |
Editor:- November 4, 2014 -
Ever since the first microprocessors and MOS memories were marketed in the
early 1970s - it was realized that systems designers in mission critical
embedded applications would need some kind of reassurance from the makers of
such chips that their new devices would still be operating reliably at some
time in the remote future.
These new semiconductor devices self
evidently had no proven market track record.
Due to the undesirability
(from an industrial chipmakers point of view) of waiting 7 to 10 elapsed
years to collect the real-time reliability evidence which would convince
industrial users it was safe to design these new products into their systems -
by which time they would be EOL and long forgotten - the semiconductor
industry evolved theoretical methods to satisfy customers in such markets much
sooner.
These marketing techniques centered around accelerated life
tests - which involved extreme temperature cycling - supported by physics based
models which explained how the breakdown mechanisms in the new chips were
accelerated at extreme temperatures - compared to their normal operational use.
I
was reminded of those extrapolated life techniques today - because they are at
the core of a document called -
non-volatile
memory program/erase endurance, data retention, and operating life test 2012
(pdf) - which is part of a set of standards for automotive electronics -
from an ORG called the
AEC.
This had been mentioned
in a press release today from Micron - who is
sampling a new
automotive-grade
SSD - the
M500IT
(pdf) (2.5" /
mSATA -
industrial grade SSD)
- whose memory components and the SSD itself have been acceleration life
tested according to the methods described along with the nostalgic sounding
(to me) stress inducing checkerboard test data patterns which I remember having
used in industrial control systems back in 1980.
Having said that -
a good reality check I heard from a long term veteran of flash memory (the
co-founder of FMJ) earlier
this year - is that aesthetically plausible geometric R/W test patterns -
such as those used to verify SSD controller
compatibilities with new flash
memories for example - aren't always the stressiest patterns which will
break the memory. | |
| . |
Editor's notes:- The above story originally
appeared in SSD news on
StorageSearch.com.
SSD history
SSD endurance
Top SSD Companies
11 key SSD
ideas in 2014
Surviving SSD
sudden power loss |
|
| . |
|
| |
|
