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Violin video re visibility
advantages of home grown controllers
Editor:- January 23, 2012 -
I commented recently that the
top 10 SSD companies in
Q4 2011 all had one thing in common (apart from the fact they make SSDs) -
they all had their own proprietary
SSD controller
architecture which they could use to optimize products for some application
markets (even if some of them also used other controllers too).
In
a
recent
video - Violin's,
CTO Software Jonathan Goldick
talks about the benefits they get from having their own controller.
I
like it because it also echoes themes I discussed last year in my
big versus small
SSD architecture article - and also because it's short - less than 250
seconds. ...watch
Violin's SSD video
BiTMICRO's new SSD controller nearly ready
Editor:-
January 17, 2012 - BiTMICRO
has named its new SSD
controller - which has just gone through
tape-out.
It's called TALINO-DE
- Translation and Linking of I/O Nodes -Device Edition. - Not very catchy - but
all the best SSD
names have gone.
The multi-core TALINO-DE is
big SSD
architecture (manages hundreds of flash chips) and includes full data path
protection, end-to-end
data integrity,
embedded AES engines for data
security, embedded XOR engines for delivering faster transaction processing
in RAID configurations,
power
management, and other resource optimization.
Editor's
comments:- the new controller appears to be in a similar conceptual class
to those which have been shipping in some
PCIe SSDs from
TMS and
Virident for
example - although these in turn are very different - starting at the
RAM cache
basics (TMS designs range from regular to fat, whereas Virident is skinny.)
If
the new BiTMICRO controller lives up to its promise - and if it's marketed as a
merchant chip set - it could lead to a commoditization of PCIe and rackmount
SSDs similar to the effect
SandForce had on the
enterprise 2.5" SSD
market.
OCZ turns to Marvell controller for newest PCIe SSD
Editor:-
January 9, 2012 - at the Storage
Visions 2012 Conference
today OCZ is
demonstrating
new
PCIe SSDs - which use
SSD controllers
jointly developed with Marvell
(instead of - as in previous models - controllers from SandForce).
Editor's
comments:- if anyone wondered how OCZ would retain its positioning in the
PCIe SSD market - relative to competitor
LSI - following the
latter's acquisition of SandForce - this anouncement is the answer. OCZ
also has its own controller line - acquired from
Indilinx.
There
are plenty of SSD controller designs in the market - and SSD designers have a
lot of freedom to choose what works best for particular markets at different
times.
NVMe compliant IP core aims at PCIe SSD designers
Editor:-
January 6, 2012 - IP-Maker
released a
data
transfer manager core - for use in
PCIe SSD designs
fitting between the media and the
flash controller. The
design is compliant with the NVM
Express specification.
PCIe SSD manufacturers will benefit from a
performance increase thanks to the IP-Maker NVMe IP core says Mickaël Guyard, Product
Marketing Director at IP-Maker. This efficient DMA manager ensures the data flow
up to the NandFlash, therefore off-loading the motherboard CPU.
SandForce joins LSI's new Flash Components Division
Editor:-
January 4, 2012 - LSI
today
announced
it has completed the acquisition of SandForce.
Editor's
comments:- most of the leading companies in the earth shaking
PCIe SSD market use
large
architecture controllers or software - which provides cost and efficiency
advantages when you compare usable capacities with maximun fault protection
enabled.
That puts competitors who use small SSD architecture (such as
OCZ and
Seagate - who use
SandForce's controller
- and STEC which has yet
to establish a stronghold in this market with its own ASIC) at a potential
disadvantage as capacities scale up.
One of the design challenges for
LSI will be to see if they can extract the proven flash management features in
past SandForce controllers and scale them up to support bigger capacities and
faster throughput without adding latency penalties (which currently accrue with
arrays of SFPs) or which uses a new processor core or split controller
architecture to better support larger flash chip populations.
Apple acquires Anobit
Editor:- December 21, 2011 -
Apple has
acquired Anobit
for a sum thought to be in the range $400 to $500 million.
SandForce enables enterprise oems to tweak the flash capacity
iceberg
Editor:- December 12, 2011 -SandForce today
announced
it is sampling a new SSD controller - the SF-2481 - which provides increased
data security and
integrity
features compared to earlier models from the company.
Editor's
comments:- the new SandForce controllers are aimed at enterprise bulk
storage applications / cloud
storage. Performance is about the same as before - and the encryption
strength is better - but the 2 main differences are:-
- New improved media health test
diagnostics.
The over provisioning feature is a key parameter which
directly impacts the competitiveness of the oems who deploy SSDs with SF
controllers - who can now decide for themselves how they want to adjust the
flash in their systems between reliability - coping for
endurance at
high IOPS -
or cost effectiveness in lower IOPS systems - where the SSD is being used in a
large storage array to
replace HDD storage.
Previous models of SF controllers hard coded this
parameter - which meant that arrays of (small architecture) SF inside SSDs were
uncompetitive compared to
big architecture
SSD systems from Violin
or Texas Memory Systems.
If
you're selling a controller which can go into such a diverse range of apps -
it's impossible for the controller designer to choose a single set up which is
best for all apps. Fusion-io
has always enabled its oem partners to tweak this paramater in its PCIe SSDs. My
headline comes from the article
flash SSD
capacity - the iceberg syndrome which discusses these tradeoffs in more
detail.
new article compares SSD controllers to SSD ASAPs
Editor:-
December 8, 2011 - continuing the series -
Who's who in SSD? - I've written a
new article today about FlashSoft.
There
are analagies between the SSD controller and auto-tiering IP market - in
addition to the obvious technical overlaps already seen in some products.
STEC vs OCZ's new SAS SSDs
Editor:- November 29, 2011
- STEC and OCZ both announced
today they are sampling new fast
SAS SSDs using
different controllers.
How can you compare such superficially similar
- but in reality quite different - products?
Just be glad if it's
not you doing the comparing. ...more on SSD news
BiTMICRO nurtures microchip design training in Philippines
Editor:-
October 25, 2011 - the Bruce Institute
of Technology is a new training institute in the Philippines - focused
on microchip design - which has been set up in a collaborated effort led by
BiTMICRO in
partnership with Synopsys,
Cadence and
leading universtities.
The name celebrates the family name of the Bruce
brothers - who founded BiTMICRO in
1995 as
an ASIC design consultancy - before embarking on their pioneering market
developments in flash SSDs.
Viking ships nv 8GB DDR3 DIMM
Editor:- October 18,
2011 -
Viking said it
is shipping
an
extension of their nv module range.
The
DDR3
ArxCis-NV plugs into standard
RAM sockets and provides
2GB to 8GB RAM which is backed up to SLC flash in the
event of a
power failure - while the memory power is held up by an optional external
25F supercap pack. Viking says these new memory modules can eliminate the need
for battery backup units in servers and the maintenance logistics associated
with maintaining them. They are specified as being maintenance free for "5
years @ 60C".
Editor's comments:- will these new modules
replace batteries in
RAM SSDs? - I doubt it
- because of scalability issues - like managing a spiderweb of 100+ dangly
bits of wire when you have a terabyte of RAM. Having said that - there are many
applications which only use a small number of memory chips which could benefit
from such a product.
Hybrid Memory Cube will enable Petabyte SSDs
Editor:-
October 7, 2011 - Samsung
and Micron this
week launched an new industry initiative - the Hybrid Memory Cube Consortium
- which will standardize a new module architecture for memory chips -
enabling greater density, faster bandwidth and lower power.
"HMC
is unlike anything currently on the radar," said Robert Feurle,
Micron's VP for DRAM Marketing. "HMC brings a new level of capability to
memory that provides exponential performance and efficiency gains that will
redefine the future of memory."
Editor's comments:- HMC
may enable SSD designers to pack 10x more
RAM capacity into the same
space with upto 15x the bandwidth, while using 1/3 the power due
to its integrated power management plane.
The same technology will
enable denser flash SSDs too - if flash is still around in 3 years' time and
hasn't been sucked into the obsolete market slime pit by the
lurking nv demons
which have been shadowing flash for the past 10 years and been waiting for each
"next generation" to stumble and be the last.
The power
management architecture integrated in HMC and the density scaling it allows
for packing memory chips (without heat build-up) are key technology enablers
which were listed as some of the problems the SSD industry needed to solve
in my 2010 article -
this way to the
Petabyte SSD.
Hyperstone's new controller enables low power skinny SSDs
Editor:-
August 3, 2011 - Hyperstone
today introduced their new
A2
family of SSD
controllers - designed to enable physically small, very low power
consumption industrial
SATA
skinny flash
SSDs.
Features include:- upto 130MB/s sustained write performance and
600 4K random write IOPS, NCQ, power down detection for increased power cycling
robustness, typical active current consumption at 25C with 100% utilization
during stress test operating 4 x 3.3V NAND Flashes of about 250mA, SATA
partial/slumber (about 150mA) and CFast PHYSLP (about 5mA) power modes
supported.
"Our A2 available in a 9x9x1.2mm TFBGA 201 is probably
the smallest and most power efficient 4-channel SATA controller in the market,"
said Mark
Gunyuzlu, President of Hyperstone Inc., USA. "We can now provide
SATA performance, industrial reliability and ruggedness for smaller form factor
systems without requiring any volatile memory prone to
power fail
issues. We also expect we are delivering the best possible random read/write
performance without relying on a DRAM, which is ideal for embedded applications."
Editor's
comments:- this is the other end of the performance scale from the
fastest SSDs which
enterprise users are used to reading about. Low power embedded systems can't
afford the luxury of the low slew rate (fat caps) power supplies you see in
datacenters. And many commercial SSDs can get trashed and corrupted in less
than an hour if they're mistakenly deployed in such systems. Putting the power
fail detection inside the SSD and having no external RAM is just one of many
patented design techniques which specialist companies like Hyperstone use in
their quest to provide failsafe protection against power line induced data
corruption.
OCZ elevates performance of Indilinx SSD controllers
Editor:-
July 21, 2011 - OCZ
is now sampling a new dual core ARM based
SSD controller for
6Gbps SATA SSDs which
can deliver upto 500MB/s sequential throughput and 200 mega transfers per
second. The
Indilinx Everest
platform supports up to 1x nm NAND Flash with 1, 2, or 3 bits per cell,
has 70 bits of BCH ECC
per sector, end to end data protection, fast boot options (50% faster than
competing SSDs) and enhanced
power fail
protection. The new platform - supports 1TB flash capacity and has a
400MHz DDR3 DRAM
cache interface with support for up to 512MB.
Editor's
comments:- ever since I wrote my
Petabyte SSD roadmap
article in March 2010 I've been waiting for controller manufacturers to
start mentioning faster boot times in their press releases. There's a long way
to go from what we have now - and the 20 milli-second range boot times needed
to support what I call SSD
library devices - but any step in electronic system design away from the
Newtonian
mechanical inertial corsets of
hard drives towards the
freer flowing boundaries set by
quantum
semiconductors is progress.
Why will the SSD industry need
ultra-fast faster boot times? They don't need to boot that fast for netbooks.
But the power consumption of a 1U multi-petabyte archive storage rack will be
too high (and too hot) unless 90% of the SSDs are normally unpowered.
is STEC better placed for 1X nm nand SSDs than those relying
on eMLC?
Editor:- July 20, 2011 - STEC held a conference
call earlier this week hosted by financial analyst
Stifel Nicolaus. Here are some higlights:-
- shrinks from 34nm to 1X nm - STEC will get early physical models
and samples of 1X nm nand flash at the the end of this year.
- ECC - STEC says traditional
BCH error codes aren't
viable for future MLC flash generations because they would need 100 / 300 bit
codes for consumer / server apps. In the server case - the error codes could
useup 30-40% of the original capacity
- eMLC vs STEC MLC. STEC said it has 2 dozen pending patents on its
MLC protection technology (called Cellcare) - which works with consumer MLC.
STEC says its MLC technology provides better operating life and more even
performance in SSDs than higher priced enterprise MLC. STEC says that the
tweaks and selections done by flash memory makers to produce eMLC won't scale to
future generations.
STEC also said that eMLC doesn't guarantee an
operating life which is as long as its Cellcare - and some SSD makers may find
they don't have a long term future in the market - due to a combination of
wear-out / performance degradation that will affect customers - and due to the
fact that eMLC isn't scalable. You can be sure this is going to develop into a
marketing claims pissing war - which will make anything you previoulsy heard
about MLC vs SLC seem much simpler and tamer in comparision.
...more highlights from the
conference call
How big was the thinking in the SSD design?
Editor:-
July 5, 2011 -
Why size really
does matter in SSD design architecture is a new article recently
published on StorageSearch.com
For
designers, integrators, end users and investors - understanding what follows
from simple Big versus Small architectural choices predicts a lot of
important consequences. ...read the article
flash SSD capacity - the iceberg syndrome
Editor:-
June 22, 2011 - have you ever wondered how the amount of flash inside a
flash SSD compares to the capacity shown on the invoice?
StorageSearch.com recently
published a new article -
flash SSD
capacity - the iceberg syndrome .
What you see isn't always what
you get. There can be huge variations in different designs as vendors leverage
capacity to tweak key
performance and
reliability
parameters. ...read the
article
optimizing SSD design to cope with flash plane errors
Editor:-
May 26, 2011 - a new slant on
SSD reliability
architectures is revealed today by Texas Memory Systems
who explained how their patented Variable Stripe RAID technology is used in
their recently launched PCIe SSD card - the
RamSan-70.
TMS
does a 1 month burn-in of flash memory prior to shipment. (One of the
reasons cited for its use
of SLC rather than
MLC BTW.)
Through its QA processes the company has acquired real-world failure data
for several generations of flash
memory and used this to model and characterize the failure modes which
occur in high IOPs SSDs.
...click to read
more
SanDisk pays $300 million for Lightning SSD controller
Editor:-
May 16, 2011 - SanDisk
announced a
definitive
agreement to acquire Pliant Technology
for approximately $327 million.
Editor's comments:- I had some
time ago made these strong comments in the profile pages of the respective
companies.
"As I see it Pliant's current business model is not
sustainable as it has a very narrow channel into the enterprise SSD market
which can easily be choked off by slot substitution." and
"Despite
occasional talk about "enterprise SSDs" - SanDisk is culturally
rooted in the consumer electronics market. That's a very competitive market in
which few companies are making profits."
This acquisition
theoretically fixes complimentary strategic weaknesses for both companies:-
Pliant (no customers) and SanDisk (no enterprise IP).
STEC shifts from FPGAs to ASICs in ZeusIOPS
Editor:-
May 10, 2011 - STEC
announced it will transition the hardware used in its high performance
ZeusIOPS (2.5" and
3.5") SSDs from a
dependence on FPGAs to ASICs. And the same ASIC design will be used in
new PCIe SSDs later
this year.
STEC also announced that its revenue in the most recent
quarter was back in alignment with the growth rates for the enterprise SSD
market - following a decline in the preceding year attributed to over
stocking by its biggest customer
EMC.
Anobit sources vital analog IP for SSDs
Editor:-
April 12, 2011 -
Anobit today
announced it has licensed IP cores from Cosmic
Circuits for several of its SoCs.
The analog IPs which consisted of linear regulators, a
power-on-reset
and a silicon oscillator (with integrated clock multiplier) were implemented in
65nm CMOS process. These IPs were integrated into Anobit's
flash memory controllers
to enhance reliability
and performance.
Kobi
Blechman, VP R&D at Anobit said, "We had a need for a diverse
set of IPs, and were looking for a supplier who had proven expertise in each of
these areas. Cosmic fit the bill perfectly. With the strong support provided by
their team, we were also able to quickly address any integration issues, making
the process smooth and seamless."
Editor's
comments:- although this press release only gives partial details of the
IP supplied (which relate to managing
sudden SSD
power loss) I'm also guessing that Cosmic's ADC technology might also be in
the mix.
Anobit uses DSP techniques to get better discrimination of
the state represented by stored charge in MLC flash. Sampling that charge itself
is an error prone process - but the "disturbance noise" filtering by
DSP can produce more reliable results if you can improve the ADC's resolution
or repeatability. Even a small incremental improvement or tweak in design at
this end can produce dramatic increases in
data integrity.
OCZ acquires Indilinx
Editor:- March 14, 2011 - OCZ today announced it has
signed a definitive agreement to acquire Indilinx for for
approximately $32 million of OCZ common stock.
Indilinx controllers
have been deployed within OCZ's SSD products since December 2008, and are
currently featured in the Z-Drive series of
PCIe-based SSDs.
Indilinx's technology is expected to enable OCZ to expand its presence into the
embedded, hybrid storage, and industrial markets. OCZ will gain substantial
intellectual property from Indilinx including approximately 20 patents and
patent applications related exclusively to the business as part of the
transaction.
Following its acquisition by OCZ, Indilinx will continue
to produce and supply its line of controller products to
SSD manufacturers and OEMs
on a global basis. The Indilinx controller business, and its 45 employees, will
remain intact under the leadership of Bumsoo Kim, the
founder and President of Indilinx, and Hyunmo Chung, Indilinx's CTO. OCZ
will continue its own R&D program to develop new proprietary technologies
and products to expand its own solid state drive offerings. The Indilinx
acquisition notwithstanding, OCZ plans to continue utilizing controllers from
other manufacturers including long-term partner
SandForce, who
currently supplies SSD processors for a wide range of the Company's SSD products
including the Vertex 2, Agility 2, RevoDrive, customizable Deneva enterprise
drives, and the upcoming Vertex
3 family of SSDs.
"This transaction is an important step in OCZ's strategy and
significantly enhances our ability to capitalize on the worldwide demand for
Solid State Drives," said Ryan
Petersen, CEO of OCZ Technology Group. "This combination brings
together 2 organizations that are committed to advancing solid state drive
design, and provides a unique opportunity for OCZ to increase both customer and
shareholder value as well as expand our reach into embedded markets."
Editor's comments:- this announcement will send ripples
throughout the SSD industry. OCZ has been one of the most successful SSD
companies at growing sales revenue by filling the gap in the mid market for
fast (but not too insanely
fast) and affordable
SSDs.
I had previously said that the most significant gap in OCZ's
profile (given its revenue and comparing it to its peers in the
top SSD companies list)
was IP. Acquiring an SSD
controller company is an astute move. In the medium term it will enable OCZ
to influence product features to maximize the fit to user market needs which
OCZ has been so adept at spotting. The newly acquired patent base will also
provide horse trading and licensing revenue opportunities in the long term.See
also:- 3 Easy
Ways to Enter the SSD Market
Anobit ships new 3-bits-per-cell flash SSD controller
Editor:-
March 8, 2011 -
Anobit
announced today that it has commenced high volume production of its
MSP2020 NAND
flash memory controller in cooperation with Hynix Semiconductor.
The
MSP2020 controller enables the use of commercial-grade 2-bits-per-cell and
3-bits-per-cell NAND flash across all of the latest process nodes, within
endurance- and performance-intensive embedded computing applications. MSP2020
controllers support up to 2 ONFI-compliant NAND interfaces to a host processor,
and can support product configurations from 4GBs to 128GBs.
In the
span of just 5 years, the endurance of mainstream NAND flash has plummeted from
100,000 program/erase cycles to approximately 3,000 cycles, and the industry
push toward 3-bit-per-cell MLC NAND will place further downward pressure on NAND
endurance.
In parallel, mobile computing devices will continue to fuel demand for higher
NAND endurance and performance, said Gregory Wong, founder and principal
analyst, Forward
Insights. Anobit's
innovative MSP technology is well positioned to close the NAND endurance
gap, and in so doing, help fuel the proliferation of NAND flash memory into a
variety of consumer electronics and computing markets.
Intel launches Marvell inside SSD
Editor:- February
28, 2011 -Intel
launched
the SSD 510 - a 2.5"
SATA 3 MLC SSD with
250GB capacity and upto 315MB/s sequential write performance which used an
SSD controller from
Marvell inside.
Atypically this product launch was not followed (a week later) by the
traditional recall / firmware upgrades which had accompanied previous Intel
driven SSDs.
new SandForce SSD controller has adaptive consumer features
Editor:-
February 25, 2011 - SandForce
today announced availability of its 2nd generation SF-2200 processors
optimized for SSDs deployed in client computing applications.
This
enables SSD makers to deliver 500MB/s R/W throughput (6Gbps SATA) and 20K
sustained and 60K burst
IOPS - and
are compatible with newly available ONFi2 and toggle flash memory from all
major suppliers.
Editor's comments:- enterprise SSD designers
were able to get this type of performance from SandForce driven SSDs last year.
But the new SSD controllers are lower cost and include many oem adaptable
features which are particularly suited for consumer applications - as I learned
from talking to SandForce's Product Marketing Director Kent Smith yesterday.
The
first interesting thing is the IOPS. You can get the random IOPS performance
even when connected to a 3Gbps SATA host. So that makes it a worthwhile upgrade
to many existing designs. The way the burst IOPS works is interesting too. In
the enterprise chip the 60K IOPS is sustainable - but in the consumer product
SandForce has tuned the design so that users can get upto 60K IOPS for about 30
to 40 seconds - then performance drops down to 20K. But after another 40 seconds
the burst rate comes back again. This cycling can continue indefinitely. For
many applications - which are peaky in nature - this will be good enough - and
cheaper than alternatives.
The next new feature in this controller is
that the SSD designer can control the power consumption of the chip - by
presetting a single code. The SF processor is clever enough to optimize its
performance upto the set wattage. That make it easier to design battery operated
products which stay within a specified battery operating time - yet still give
fast performance.
Another new feature is the ability for SSD designers
who want to get good performance in cost sensitive consumer apps - is the
ability to remove the RAISE (RAID
for chips) feature. In entry level SSDs this provides significantly more usable
capacity. Error
checking etc remains unchanged - in fact it has been improved in the 2nd
generation chips - but the SSD won't survive the failure of a whole memory
chip as it can do with the feature enabled.
what happens in SSDs when power goes down? - and why you should
care
Editor:- February 24, 2011 - StorageSearch.com today published
a new article -
SSD power is
going down! - which surveys power down management design factors in
SSDs.
Why should you care what happens in an SSD when the power goes
down?
This important design feature - which barely rates a mention in
most SSD datasheets and press releases - is really important in determining SSD
data integrity and operational reliability.
This article will help
you understand why some SSDs which work perfectly well in one type of
application might fail in others... even when the changes in the operational
environment appear to be negligible. If you thought
endurance
was the end of the SSD
reliability story - think again. ...read the
article
will Micron's enhanced flash memory really eliminate error
concerns?
Editor:- December 3, 2010 - Micron recently
announced availability of enhanced 16GB to 64GB 25nm
MLC
flash memory chips with integrated error management - which the company
says - removes the burden of ECC from the host and simplifies the use of flash
in enterpise apps.
"The pace of NAND scaling is largely
responsible for the incredible growth and success the industry has seen to date,
and for helping to create new flash-based storage solutions," said Glen
Hawk, VP of Micron's NAND Solutions Group. "While the advantages in NAND
scaling are evident, so are the challenges with the technology becoming
increasingly more difficult to manage. Micron's ClearNAND products remove this
management burden for our customers and extend the life of this all-important
technology."
Editor's comments:- as discussed in my recent article -
bad block
management in flash SSDs good blocks and less good blocks have always
coexisted in flash memory. But as device geometries shrink (to increase
capacity and speed) the margin of error between usable and non usable cells has
shrunk too. In practical terms this means that the raw media quaility of new
flash chips has declined in the past decade from under 1% defects, then 2%, 5%
and I've seen projections as high as 10% for emerging MLC.
Managing
these defects (which in theory are isolated and can be quarantined by vrtual
address management techniques) is just one of the many
data integrity
challenges which SSD
controller designers have to work with.
What is not generally
appreciated is that it takes a lot of work and experience with the raw
flash to create a model
which you think represents how these bad bits will be distributed inside the
chip population over time. The ECC designer's job is to create a correction
model which gives the best data outcomes - given the raw material with which
they have to work. Different designers may choose different strategies based on
their intellectual understanding of the problem, patent portfolio, the market
the SSD is designed for and other constraints.
If you could clone
a bunch of flash chips and place them in 3 different SSD designs - the
lifetime of those 3 SSDs would vary significantly - even running the same
application and identical data. The difference would be due to how well the
controller designers matched their management techniques to the decaying
processes in the flash array.
By burying some of the ECC stuff inside
the flash chip - Micron makes it easier for SSD designers to create an SSD which
looks good when it is new. But it also introduces another risk factor - because
if Micron get their models wrong - then many SSD designs may fail much earlier
than predicted. That's always been true in the past too. In 5 years time we'll
know better which designers got it right and which didn't.
In the
distant past I
used to design measuring instruments which pushed technology boundaries - and
an important part of making them work was creating and testing error budget
models - over time. Then in the process control world as now in SSDs - physics
and chemistry are the realities which can rudely interrupt all your carefully
contrived plans. Sometimes you're lucky it happens in the lab, or the test
sites, but when there's a disagreement between the concept and the real world -
reality always wins - reality is not a compliant servant and doesn't always fit
snugly within the urgency of marketing plans.
new book - Inside NAND Flash
Editor:- November 17,
2010 - Forward
Insights (an SSD
analyst company) is one of the contributers to a new book called -
Inside
NAND Flash Memories.
The publishers say that
SSD designers must
understand flash technology in order to exploit its benefits and countermeasure
its weaknesses. The new book is a comprehensive guide to the NAND world -
from circuits design (analog and digital) to
reliability.
Intel invests in SSD controller company
Editor:-
November 16, 2010 - Anobit
today
announced that it closed a new funding round of $32 million led by Intel
Capital - bringing Anobit's total funding to over $70 million.
Editor's comments:- unlike another well known
SSD controller company
- Anobit is a company which until today has been known by a very small number
of analysts - and competitors and maybe even some
SSD companies who might be
using their products. I'm sure that - as a result of today's announcement -
they will get better known too.
pushing the SSD testing rock farther up the hill
Editor:-
August 25, 2010 - I'm mostly resistant to the idea of rehashing recent news
stories - but yesterday while talking about new SSD technologies a reader
asked me to take another look at
SNIA's SSD
performance testing guidelines - which I reported on
a month ago.
I
said I had been surprised it took
ORGs like
SNIA so long to look at
these issues - because I had been aware of "Halo effects" in
flash SSD benchymarks for years - and commented - "But I guess member
led ORGs have a built in lag factor and only move at the speed of the
slowest exec members."
The reader - Neal Ekker -
whom I knew from his time at
Texas Memory Systems -
put up a spirited defense for this particular ORG opus and said...
""...We've
all known about the fishy-ness of SSD performance claims for years. But I'd like
to draw attention to what an impressive accomplishment the SNIA SSS PTS
represents, no matter its technical merits or ramifications. I watched it
happen, and I can tell you it was an amazing POLITICAL achievement. And
I don't mean that in a negative way. Any time there's more than one person in a
room, there's politics. For a collection of engineers representing both their
own egos and the interests of their employers to finally agree on even this
rather bare-bones beginning standard was just remarkable to observe. I can't
begin to give enough credit to some of the chief movers and shakers.
Neal Ekker added - "This is why I want more attention focused on
the SSS PTS right now, so we don't lose momentum entirely. There's still plenty
of work to be done. We need additional companies and fresh faces and energies to
step up and push this rock a little farther up the hill."
Editor's comments:- During the majority of the SSS PTS development Neal
Ekker served as the SNIA SSSI Education Committee Chair. He's now a for-hire
independent SSD marketing consultant. ...Neal's bio,
...SSS
PTS (pdf), Storage
People
Samsung and Seagate to codevelop SSD controllers
Editor:-
August 13, 2010 - Samsung
and Seagate -
recently
announced
they will jointly develop
SSD controller
technologies to operate with Samsung's 30nm-class MLC NAND.
The
jointly developed controller will be utilized in
Seagate's
enterprise-class SSDs.
Editor's comments:- despite being a keen advocate for solid
state storage since 2005 - Samsung has never had the IP it takes to develop
best in breed enterprise SSDs. Seagate, a relative newbie in the SSD market,
doesn't have SSD IP either - but it does have
hard disk interface
experience.
Developing (or
acquiring) its
own SSD IP has always been desirable for Seagate. The new agreement also helps
to explain why the company was not happy to confirm industry reports that its
1st SSD actually used SoCs from
SandForce.
Will
the 2 companies be able to develop world beating SSD controller technology?
In my long experience of talking to people in companies which do have
strong and unique SSD architectures - I have got the impression that a
successful enterprise SSD design needs:- unity of purpose, very strong
technical leadership, good sense of market direction, and years of fine tuning
design iterations.
I don't think that an inter company collaboration
like Samsung and Seagate can achieve the NO-COMPROMISE design
decisions which are needed to develop world beating enterprise SSD
architectures - no matter how talented individuals in the engineering pool may
be.
SNIA publishes draft SSD performance testing doc
Editor:-
July 12, 2010 - SNIA
today announced the availability of its
Solid State Storage
Performance Test Specification (version 0.9) for public review.
A
typical flash SSD
taken "fresh out of the box" and exposed to a workload, experiences a
brief period of elevated performance, followed by a period of transition to an
eventual performance Steady State. The new SNIA methodology will close the gap
between performance measurements
in the lab and in normal working life and make competitive vendor
comparisons more useful.
Editor's comments:- The SNIA
initiative is welcome but long overdue. All
standards ORGs are slow to
react to market trends.
2 years ago I published an article
called - Can you trust
flash SSD specs & benchmarks? - because it had been clear to me
that many oems and publications didn't know about what I called the "halo
effect" - which could make flash SSDs look better than they really
were. Prior to that I had asked some vendors to retest their devices using
longer test runs before publishing their benchmarks. | |
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made insensible to soft errors in many different ways (by design or by
software) NVMs are also susceptible to irradiation errors... The lack of any
refresh cycle of the stored information make flash memories vulnerable to data
loss at each exposure to ionizing radiation even at the amounts which occur at
sea level and in terrestrial environments." |
...Emanuele
Verrelli and Dimitris
Tsoukalas, in their chapter called Radiation Hardness of Flash and
Nanoparticle Memories - in the multi-author free online book Flash Memories
- published in September 2011 by InTech
Editor's comments:- that's another reason you need to run
a data healing process in the SSD controller task list BTW - not just to fix
disturb errors. | | |
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| this way to the Petabyte
SSD |
In 2016 there will be
just 3 types of
SSD in the datacenter.
One
of them doesn't exist yet - the bulk storage SSD.
It will replace the
last remaining strongholds of
hard drives in the
datacenter due to its unique combination of characteristics, low running costs
and operational advantages. |
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... |
The new model of the
datacenter - how we get from here to there - and the technical problems which
will need to be solved - are just some of the ideas explored in this
visionary article. | | | | |
