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SSD Controllers and IP - news articles and directory

by Zsolt Kerekes, editor

SSD Controllers and IP define the personality of the SSD.

Controller architecture and effective implementation processes (including manufacturing, logistics and software) transform unreliable me-too memory chips into the diverse range of application optimized (or not) SSDs which you can see in the market today.

This dedicated SSD controller page - lists 30 or so SSD flash controller IP companies which sell (or used to sell) their controllers in the merchant market. But StorageSearch.com also analyzes SSD architecture in proprietary arrays and in software too.

SSD symmetries
Rethinking enterprise RAM
SSD endurance - the forever war
Why size matters in SSD design architecture
Data Integrity Challenges in flash SSD Design
Adaptive R/W and DSP ECC IP for use in flash SSDs
SSD controller news on other sites:- Rediff.com, DigiTimes
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SSD controller news - here on StorageSearch.com
SanDisk agrees to buy Fusion-io

Editor:- June 17, 2014 - What will SanDisk really get from Fusion-io? - more usable flash petabytes out from the same raw wafer starts - due to better architecture. ...more in SSD news


PLDA enters the PCIe SSD controller market with 6.6 Gb/s NVMe controller

Editor:- June 9, 2014 - PLDA today anounced immediate availability of a new SSD controller aimed at the PCIe SSD market.

PLDA's XpressRICH3 IP is a high performance, low latency, highly-configurable PCI Express 3.0 soft IP supporting endpoint, root port, switch and bridge configurations. The design has been engineered for both ASIC/SoC and FPGA implementations.

Editor's comments:- PLDA has written a product description - Conquering the challenges of PCIe with NVMe in order to deliver highly competitive Enterprise PCIe SSDs (pdf) - which contains an overview of the design. Here are some extracts.
  • power saving features? - PLDA implements L1 PM Sub-states, reducing power consumption without affecting performance.
  • performance? - 270K write IOPS, 12µS write latency write (4KB) using the FPGA-based reference design.
Here are some questions I put to the company.
  • is there a minimum order quantity or cost associated with licensing your IP?

    No minimum quantity.
  • What is your deliverable?

    An Encrypted Source code file that can be downloaded or sent on CD
  • How does a customer evaluate your IP?

    We provide 1 month Free Evaluation IP



SMI supports 16nm nand with new SATA SSD controller

Editor:- June 4, 2014 - Silicon Motion today announced support for Micron's 16nm 128Gb nand flash with its SM2246EN SATA 3 SSD controller which enables 67K / 65K R/W IOPS (4KB) while also enabling low power designs (2mW DevSleep mode and 21mW Slumber mode).


Seagate agrees to acquire LSI's SSD business

Editor:- May 29, 2014 - Seagate today announced it will acquire the assets of LSIs Accelerated Solutions Division and Flash Components Division from Avago Technologies for $450 million in cash.

The transaction is expected to close in the 3rd quarter of calendar year 2014, subject to regulatory approval.

Editor's comments:- Have you wondered... why didn't it cost more? (That tells you something about the state of the SSD market.) And what will happen to the supply of SF controllers? ...read more in SSD news


Hyperstone samples new industrial controller for high integrity USB 2 SSDs

Editor:- May 26, 2014 - Hyperstone today announced that it has begun sampling controllers for USB 2 SSDs aimed at low power, high reliability and long data retention applications in the industrial market.

Hyperstone says its U8 USB controller (available as probed die and in a QFN-76 package) works with SLC and 1x nm MLC.


Marvell samples controller for SATAe SSDs

Editor:- May 21, 2014 - If you're designing SATA Express SSDs then Marvell today announced it is sampling the 1st SSD controller specifically designed for the SATAe market - which will enable the design of 2.5" PCIe SSDs at costs which could be competitive with fast SATA SSDs.

Marvell's 88SS1083 is a 2 lane PCIe Gen2 SSD controller with transfer rates up to 1GB/s. It supports DevSleep and L1.2 PCIe low power state - to minimize power consumption in notebook and enterprise array environments. Its flash management scales down to 15nm NAND.


PMC blog discusses latency implications of DSP ECC IP in SSD controllers

Editor:- May 15, 2014 - Latency in LDPC-based Next-Generation SSD Controllers is a new blog by Stephen Bates, Technical Director, PMC who says - "The variability of the LDPC decode time is a function of how many iterations it takes to decode the data from the flash."

In his article Stephen says that the minimum number of iterations is 1, typical is 4 and maximum is 20.

To relate that to latency - he says assume for sake of illustration that each iteration takes a microsecond.

Editor's comments:- you can see how those numbers can start to stack up and make inroads into the design of fast SSD controllers.

That's one of the reasons you've got so many different generations of flash memory circulating in the same market today.

The higher the capacity of the SSD - the greater the economic incentive to use newer smaller flash geometries. But those require more complex controller management (to guarantee data integrity) so that incurs greater design complexity and NRE.

PMC's market is the enterprise - but these DSP flash concepts are used in industrial markets too. In fact that's where they originated. Bu in industrial SSDs it can still be sometimes cheaper to deploy more expensive SLC memory in low capacity designs - due to the simpler requirements of the associated controller technology and therefore also lower demands for power hold up time too.

PS - in an earlier blog in this series - Stephen Bates (whose PhD was in signal processing) - revisits the reasons why the SSD market needs to consider the design freedoms which come from using complex DSP flash IP - and he gives examples of the tradeoffs. Such as 50% better endurance with LDPC codes using identical flash - or gaining usable capacity by using weaker codes.

BTW the industry changing possibilities of these technologies for reshaping the economies of SSDs were reviewed in my 2012 article - Adaptive flash care management & DSP IP in SSDs What is it? Who does it? and why?


FPGA as ASIC - efficiency perspectives

Editor:- April 28, 2014 - The merits of FPGA versus ASIC in SSD controllers comes up from time to time on these pages.

The clearest analysis of the design efficiency advantages of FPGA versus ASIC (based on silicon footprint) that I've seen - along with a useful historic perspective - can be seen in this article - FPGA as ASIC Alternative: Past and Future by Zvi Or-Bach, President and CEO of MonolithIC 3D .

Zvi says - "Research shows that an FPGA can is approximately 30x larger and between 3 to 5 times slower on average than a standard-cell implementation. This high programmability overhead suggests that many of the current ASIC designs cannot be replaced by an FPGA design. Consequently, when advanced technology NRE is too high, the alternative is to use older node ASIC technologies." ...read the article


are you ready to adapt to new ways of thinking about DRAM?

Editor:- April 2, 2014 - enterprise RAM doesn't have to be boringly predictable. If adding intelligence to flash makes better SSDs - then how about revisiting all the assumptions in DRAM too?


how safe are your assumptions about SLC?

Editor:- March 18, 2014 - SLC is regarded as the "gold standard" in nand flash memory today when it comes to SSD endurance.

Or maybe it would be more accurate to say - "SLC is the depleted uranium standard" when it comes to choosing ingredients for hardening the SSD data integrity sandwich.

So you can imagine my surprise- when in a recent conversation about the reliability aspects of SSDs - I was told about some unique and proprietary "brutal and awkward test patterns" - which had uncovered design flaws in a new type of SLC memory while it was being characterized for use in SSDs.

This indicated that SSDs designed using that memory in some applications could be killed in as little as 3 to 9 months of use.

This design vulnerability never showed up at all in the "standard" SSD controller test patterns which are used throughout the industry. And their application wasn't for an SSD accelerator - but for a regular speed industrial SSD.

From the customer point of view - if you want an embedded SSD which you can rely on - it's nice to know that some people still design SSDs the old fashioned way - and test every assumption along the way.

That was just one of many new things I learned talking to Dave Merry and John Conklin co-founders of a new SSD company called FMJ Storage - which has - for the past several years been operating profitably while under the general market radar. You can see more about what we talked about in - Who's who in SSD? - Full Metal Jacket


ATP's industrial SSD firmware has been screened for power fail vulnerability

Editor:- February 5, 2014 - ATP said today that the design qualification process of the firmware used in its new industrial 2.5" SATA 2 SLC SSD range - the Velocity SI-Lite - includes assessing the data integrity vulnerability to "multiple power outage conditions during different R/W timing and the product has passed several thousands of power cycles during the strict product qualification process." See also:- Surviving SSD sudden power loss


Avago acquires LSI

Editor:- December 16, 2013 - LSI today announced that it has agreed to be acquired by Avago Technologies Limited in an all-cash transaction valued at $6.6 billion.


SSD reliability is tools deep

Editor:- November 26, 2013 - Although we often talk about SSD controllers and flash memory chips as being "hardware" - none of these devices would exist if it weren't for a rich software ecosystem of design automation and verfification tools which have evolved to enable semiconductor system design in the past 30 years or so.

So the reliability of SSDs depends not just on the interplay of physics, architecture, electronic factors and firmware - but just as importantly - reliability or more accurately the dependability and determinability of any SSD design begins with the verification and integration of all the design abstractions - in software.

A salutary reminder of the importance of this came today in an announcement from Hyperstone about its use of such tools from Synopsys in its design process for controllers aimed at the industrial and medical markets.

"Our new S8 SD 3.0 and eMMC 4.4 industrial flash memory card controller is designed to deliver the highest level of reliability and data retention when using innovative sub-20nm MLC flash technologies" said Axel Mehnert, VP of Marketing at Hyperstone. "Our mission is enabling future NAND flash and advanced technologies to be fit for use, especially within industrial, ruggedized applications. This requires the robust verification and analysis provided to us uniquely by Synopsys' VCS functional verification solution. No other technology had the capacity, performance, advanced verification features and reliability to verify such complex designs."

Editor's comments:- in reality it's never as simple as - we used these tools - turned the handles - and the design popped out. May work for simple devices like CPUs or DRAM - but not for real complicated stuff like SSDs. Imagination, true grit, magic spells and serendipity are essential elements in SSD alchemy too.
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Flash memory Summit logo and date
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LSI integrates "SSD market on a chip"

Editor:- November 18, 2013 - LSI today launched its 3rd generation SandForce SSD controller family - the SF3700 which - based around a single chip design - spans a wide spectrum of SSD market applications (from consumer to enterprise) - includes native jumper-selectable SATA or gen 2 PCIe interfaces - and incorporates adaptive R/W DSP ECC management.

Editor's comments:- The SF3700 (now sampling) is the most ambitious design of a single chip SSD controller in SSD market history.

Its 14 core design integrates many impressive design and architectural features including:-
  • the ability to efficiently configure as either a small architecture or big architecture SSD controller.

    The SF3700 design can be configured with as little as 3 flash chips in entry level consumer SSDs - or as many as 129 chips when maximally configured in a 9 channel enterprise design which can recover from the complete failure of a memory chip as well as partial failures in other memory chips in the array.
  • dynamically adjusted power islands within the chip - enable a single silicon design to support both the low requirements of deep sleep mode in SATA notebooks as well as the performance requirements of entry level PCIe SSDs.
I recently spoke to Kent Smith at LSI about this new product.

Our conversations about SandForce SSD controllers go back more than 4 years - so we skipped a lot of stuff.

One of the first things I said to Kent - was - I've been nagging you for years and asking - when are you going to do a native PCIe SSD controller?- and for nearly 2 years it's been clear that another big hole in LSI's SSD IP bag has been adaptive R/W - and now you've finally done both at the same time in a single product.

I was also really impressed by the quality of LSI's briefing document on the LSI SandForce SF3700 (pdf) - which explains just about everything you need to know. So I asked Kent - why does he need to waste time talking to editor's like me? - why doesn't LSI just publish the document on the web and let it speak for itself?

I said a lot of publications will simply copy some of your pictures without attribution - and I think readers would find it valuable seeing them too - but I think it would be fairer to the work you've done if I could just make the whole document available - so there was no doubt who had done the hard work of communicating what the design was all about.

He agreed to that - and you can click on the link above to see the original info which I got from LSI.

Some other things I learned from this conversations were:-
  • The SF3700 is a completely new design. - It leverages all the flash related design concepts related to endurance and array level fault management which have been proven in earlier designs and extends them too.

    For example RAISE has been enhanced so that for high-end configurations it can protect against a full memory chip failure as well as multiple block faults - whereas entry level SSDs which need some RAID like features but can't afford an extra memory chip can use fractional RAISE.
  • One of the reference designs which LSI offers for this controller is for an M.2 form factor - which is goiing to be the game changing SSD for the consumer market next year. The card design is the same whether the SSD is being used as a SATA or PCIe SSD. A single jumper sets the configuration at assembly time.

    LSI's 2.5" reference design will also make it easier for oems to produce products for enterprise arrays in the 2.5" PCIe SSD market.
Overall I think the SF3700 is a very ambitious and outstanding SSD controller design - which will elevate LSI's reputation within the SSD industry.

For the past year or so I had been wondering if the glory days of LSI's SSD controller technology lay mostly in the past. But I can now understand why it took them so long to integrate this new design - which is almost at the integration level of "SSD market in a chip".

A design which integrates so many architectural features which are optimized for so many markets wouldn't have been feasible for a small SSD start up.

Below you can see one of the many pictures I spoke about in LSI's paper. If you click on it you'll see the whole thing.
briefing doc on new SF controller
PS - I almost forgot to mention one funny marketing thing I learned.

Kent told me that they used to call the SandForce products "SSD processors" but then found that didn't show up too well in web searches - because people were looking for "SSD controllers" instead. So LSI has changed its parlance and is now calling them "SSD controllers" too.

As I said above - Kent draws some great pictures which illustrate the functional blocks within SSDs. He also writes a lot of SSD blogs too. So I was relieved to hear that he gets paid on an SSD marketer's pay grade rather than that of a writer. That means SSD editors and bloggers don't need to worry that he'll be tempted to come and replace us.


Phison controller inside Chromebook

Editor:- November 14, 2013 - Phison Electronics today announced that its PS3109 controller is being used in an SSD inside the C720 Chromebook launched recently by Acer.


Toshiba will design new SSDs using DensBits' flash controller IP

Editor:- October 21, 2013 - DensBits today announced that it has licensed its advanced Memory Modem technology (a variety of adaptive R/W and DSP flash controller IP) to Toshiba for use in new designs of SSDs.


MOSAID resumes the conversation about licensing HLNAND

Editor:- September 23, 2013 - Growing market demands for capacity and performance in the enterprise SSD market is highlighting the intrinsic weaknesses in standard flash memory interfaces.

That's the theme of a recent blog - about HyperLink NAND technology and scalability by Peter Gillingham, VP and CTO Conversant (the new name for MOSAID Technologies) who writes - "In the enterprise server space, where PCIe is often used to connect storage hardware, SSDs require as many as 25 to 50 channels to provide the throughput demanded by the system interface... but even 2nd generation flash interfaces such as ONFi and toggle mode are not up to the job."

Editor's comments:- MOSAID - which will legally change its name to Conversant in January 2014 - first started talking about its HLNAND architecture in May 2007. But the company - which recently changed its name - has been licensing its patents in fast memory systems design since the 1990s.

Among the many reasons - why the company says its HLNAND simplifies the design of ultra high bandwidth scalable SSDs (pdf) are the low loading on each device which means that latency is not degraded to the same extent by capacitive bus load as in traditional memory topologies.


Proton Digital launches new controller platform

Editor:- August 12, 2013 - Proton Digital Systems today announced details of its new LDPC based FlashPro (a large architecture, adaptive DSP, controller ) platform which will be demonstrated this week at the Flash Memory Summit.

Proton says its error recovery technology enables reliable deployment of next generation 1y-nm/1z-nm MLC, TLC and 3D Flash memory from all major NAND Flash manufacturers. FlashPro also features a micro-programmable sequencer that supports Toggle and ONFi interfaces and addresses all flash commands, including customer-specific commands.

FlashPro has upto 8 flash channels each supporting 533MBps and up to 32 Chip Enables per channel. Each media manager can support data transfer rates from 50MBps up to 4.27GBps and multiple instantiations can be integrated to achieve the desired capacity and performance.


Silicon Motion samples fast low power SATA 3 SSD controller

Editor:- August 12, 2013 - Silicon Motion today announced it has begun sampling a low power consumption, fast SATA 3 regular RAM cache SSD controller which supports MLC, TLC and SLC NAND flash from all the major NAND suppliers.

The SM2246EN supports 4 channels of NAND flash devices with up to 8 CEs per channel and can enable sequential reads upto 540MB/s and writes upto 410MB/s. Random IOPS performance is upto 80,000 read IOPS and 75,000 write IOPS. Average power consumption is 60mW. Security features include AES 128/256, TCG and Opal full-drive encryption compliance.

Editor's comments:- in a paper this week at the Flash Memory Summit - the Efficient LDPC DSP System for SSD (pdf) - Jeff Yang Principle Engineer, Silicon Motion discussed how its LDPC adaptive DSP techniques which supports variable parity lengths provides 3x better data integrity than traditional BCH.


Seagate invests in eASIC

Editor:- August 5, 2013 - eASIC today announced it has got a strategic investment from Seagate.

eASIC has demonstrated innovative custom silicon technology with our... solid state hybrid drives said Rocky Pimentel, chief sales and marketing officer at Seagate. eASICs ability to quickly develop custom solutions while meeting stringent cost, power and performance requirements will enable us to rapidly improve our product position in both SSD and SSHDs.


Overview of PCIe topologies for enterprise SSDs

Editor:- July 17, 2013 - PLX Technology recently published a white paper - Enterprise Storage and PCI Express - which gives an overview of past, current and future PCIe SSD connection topologies along with a list of detailed reference articles.

In recent years we've seen the start of a growing diversity in both the type and functionality of PCIe SSDs. PLX's new article provides a good introduction to what can be done with PCIe in an SSD context - and may make you rethink your ideas about the roles of this interface too. ...read the article


Skyera increments SSD brainiacs headcount

Editor:- May 14, 2013 - Skyera today announced it's new chief architect is Andy Tomlin - who was formerly VP of SSD Development at WD and before that was VP of firmware and software at SandForce.


the challenges facing memory channel SSDs

April 29, 2013 - StorageSearch.com today published a new article - Memory Channel Storage SSDs - will the new ultra low latency SSD concept fly? - should you book a seat yet?


OCZ will exit SandForce driven consumer SSD market

Editor:- April 17, 2013 - OCZ today announced it will move the majority of its consumer SSDs to its own Barefoot 3SSD controller technology (Barefoot 3) in the next few quarters. Effectively exiting the very competitive LSI/SandForce controller driven consumer SSD market should make it easier for OCZ to differentiate its products and get better profit margins.


Intels oems LSI's RAID caching SSD technology

Editor:- April 8, 2013 - Intel - which already uses LSI's SandForce controllers in some SSDs - will oem LSI's dual-core RAID-on-Chip flash caching technology it was announced today.

LSI says their caching technology can double the number of VDI sessions supported in the same sever and flash environment.

Intels selection of LSI Nytro MegaRAID technology is another significant validation of our strategic focus and investments in flash-based server acceleration technology, said Gary Smerdon, senior VP and GM, Accelerated Solutions, LSI.


SSD performance characteristics and limitations

Editor:- March 15, 2013 - published today - the new home page blog on StorageSearch.com is - a toolkit for understanding flash SSD performance characteristics and limitations. It brings together in one place many of the tools I use every day when thinking about and assessing SSDs.


Violin migrates controller implementations to eASIC

Editor:- February 27, 2013 - Violin has selected ASICs from eASIC's Nextreme-2T range to replace high density FPGAs and implement fast flash controller functions more efficiently within its 6000 series SSD rackmounts it was announced today.

There is tremendous innovation going on in the enterprise storage market and we are thrilled to be working with Violin, one of the fastest growing leaders in this space, said Ronnie Vasishta, President and CEO, eASIC. OEMs need to continuously innovate and quickly ramp to volume production. We are starting to see a tipping point where FPGAs cannot be used in mission critical, power sensitive, volume applications and the ASIC alternatives do not meet the requirements. Traditional cell-based ASICs just take too long to design and ASSPs have limited flexibility for the NAND FLASH interface.


Silicon Motion's new mobile devices TLC SSD controller

Editor:- February 21, 2013 - Silicon Motion announced imminent sampling of a new SSD controller - for consumer handheld products.

The SM2703 is a single-channel, SD 3.0 UHS-I (Ultra High Speed Phase I) card controller with superior support for the vast majority of NAND flash, including 2y-nm, 1x-nm and 1y-nm TLC and MLC which delivers up to 95MB/s and enables full HD video recording capability by digital cameras, smartphones and other mobile devices on both Class 4 and Class 6 SD flash memory cards using cost-effective TLC NAND flash.

"We've already had tremendous success in the UHS-I market since we introduced our first UHS-I controller 2 years ago - which was used by most of the world's leading flash card brands" said Wallace Kou, President and CEO of Silicon Motion. "Our solution was widely adopted because it was high performance, cost-effective, and supported the vast majority of available NAND components. Our new 55nm based SM2703 controller is firmware compatible and is a cost-effective, flexible quick way to market for customers who want to use the latest MLC and TLC NAND flash."


Proton gets funds to rejuvenate prospects for flash

Editor:- February 7, 2013 - Proton Digital Systems today announced the completion of its $2 million seed round to support continued development and expansion of its LDPC-based flash read channel IP products that increase the endurance and longevity of flash memory.

Protons IP is currently licensed for enterprise and consumer applications and has already been adopted by some of the worlds largest flash memory companies.

See also:- adaptive R/W and DSP IP in SSDs, flash SSD management care schemes

RunCore is 1st to announce BiTMICRO OnBoard

Editor:- January 29, 2013 - today announced that RunCore will use BiTMICRO's Talino controllers in its new Kylin III MAX family (fast PCIe SSDs).


Marvell aims at SSD on a chip market

Editor:- January 2, 2013 - Marvell Technology today announced it has made a strategic investment in Memoright.

As part of the new collaborative agreements Memoright will write firmware for Marvell's eMMC controllers - which will speed Marvell's entry into the tiny SSD market for use in smartphones and tablets.


Proton's 9x endurance, 2x speed enterprise flash IP now available

Editor:- December 17, 2012 - Proton Digital Systems today announced the immediate availability of an LDPC ( Low Density Parity Check) NAND FLASH read channel for enterprise storage applications compatible with implementation using eASIC which enables enterprise storage vendors to double the throughput performance at approximately half the power that can be achieved using state-ofthe art FPGAs.

The Proton Digital Systems LDPC read channel enables enterprise FLASH storage system companies to leverage low cost MLC flash devices and increase its longevity to 45,000 program/erase cycles, compared to only 5,000 program/erase cycles with traditional BCH algorithms.

We were keen to work with eASIC as we are increasingly seeing eASIC devices being selected as platforms for enterprise grade customized flash controllers, said Dr. Andrei Vityaev, CEO at Proton Digital. In enterprise storage systems, production volumes are often not high enough and the market changes are too dynamic to justify cell-based ASICs but performance and low power requirements are beyond the capability of FPGAs. This makes an eASIC flash controller solution ideal for this space.

Editor's comments:- this adaptive flash DSP technology enables oems to do the kind of things which SMART and STEC already do in SAS SSDs, and which Skyera does in its rackmounts. This type of technology will become essential for fast-enough SSD makers to remain efficient and competitive in the next few years. The only other game in town for licensing something similar right now - is DensBits.


experimental technique eliminates flash endurance limit

Editor:- December 2, 2012 - An article in IEEE Spectrum - Flash Memory Survives 100 Million Cycles - summarizes a recent research paper by Macronix - which described an experimental technique to redesign flash cells to improve endurance.

The technique - which StorageSearch.com does not think is feasible to scale for commercially competitive memory densities - involves designing addressable heaters in the memory array which can pulse upto 800 degrees C for a few milliseconds. This thermal "refreshing cycle" anneals the chip material and heals common wear-out defects while also enabling the cells to be run faster.

Afterward, we realized that there was no new physics principle invented here, and we could have done this 10 years ago said Hang-Ting Lue, the project director at Macronix
Micron sources power holdup technology for NVDIMMs

Editor:- November 14, 2012 - Micron has signed an agreement with AgigA Tech to collaborate to develop and offer nonvolatile DIMM (NVDIMM) products using AgigA's PowerGEM (sudden power loss controller and holdup modules).


Crocus will sample secure fast MRAM controllers in January

Editor:- November 5, 2012 - Crocus Technology today announced that in January 2013 it will sample 1.2MByte high speed SIMs and small secure MRAM controllers. The fast R/W speeds will enable optimized personalization and over-the-air updates in NFC-enabled smartphones.

The CT32MLU product family breaks the barrier of traditional non-volatile memory that will provide smartcard makers with best-in-class secure element microcontrollers with a 20 to 30% smaller footprint, said Alain Faburel, VP security business unit at Crocus Technology.


the next big SSD idea?

Editor:- October 3, 2012 - StorageSearch.com today published a new blog the advantages of comparative differences in SSD design efficiency.


Intel paper - Data Integrity on 20nm flash SSDs

Editor:- August 22, 2012 - "Avoid skepticism and seek understanding" - is one of the calls to action in Intel's paper - Data Integrity on 20nm SSDs (pdf) - presented today at the Flash Memory Summit

In a bold move at the start, the author - Robert Frickey - brings to the fore the subject of flaky SSDs and firmware bugs and recalls - naming several SSD vendors in this context - including Intel.

He says "Despite datasheet metrics, it's not easy to predict behavior of SSDs in the field. Validation should be considered as part of data integrity."

Even if you've already read many other articles on SSD data integrity - this paper clearly communicates some fundamentals about flash cells and the variety of different types of disturb errors which makes it a useful educational document.

In tone with what some other leading SSD companies are saying too - the author urges you to "Understand your usage model and endurance requirements. Innovate around application needs." ...read the article (pdf)


IDT samples controllers for NVMe compatible 2.5" PCIe SSDs

Editor:- August 21, 2012 - IDT today announced it's sampling single chip NVMe compatible flash SSD controllers for designers in the PCIe SSD market.

2 models are available:- a 16-channel with PCIe x4 Gen 3 (89HF16P04AG3 for smaller footprints such as the 2.5" PCIe SSD market - supports upto 2TB capacity) and 32-channel with PCIe x8 Gen 3 (89HF32P08AG3 for the conventional size cards upto 4TB capacity) - in 27 x 27 mm and 40 x 40 mm FCBGA packages respectively.

Both products support connection to 2 hosts and failover for HA applications.

Editor's comments:- for those of you who like videos - I suggest you see IDT's video which starts with an introduction to acceleration SSDs, explains the advantages of having a standard such as NVMe - which means that oems can have a single common set of drivers which work with SSDs from multiple vendors and describes more features of the products - including hot pluggability.


DensBits acclaimed with "most innovative flash memory technology" award

Editor:- August 27, 2012 - at the recent Flash Memory Summit last week DensBits was acclaimed Best of Show award winner in the category of most innovative flash memory technology for its 3 bits/cell adaptive DSP IP controller technology (which the company brands as its Memory Modem).

Editor's comments:- as I said here in April when the company exited stealth mode - it was clear that this was a company which would make waves in the SSD market. It shot straight into the top 20 SSD companies list in the same quarter. The recent award from Flash Memory Summit - which is based on a panel of industry experts - is well deserved.


LSI ships 1 million SandForce controllers / month

Editor:- July 31, 2012 - LSI has announced enhanced support for the Ultrabook SSDs market in its SandForce SF-2200/2100 controllers:- enabling lower SSD power consumption, faster boot and support for "virtually all MLC flash product families".

LSI has shipped well over 10 million SandForce processors and we anticipate our shipment volumes will continue to increase, driven by the exploding demand and lowering price points for NAND flash technology, said Thad Omura, VP of marketing, Flash Components Division, LSI.

Editor's comments:- last week I asked LSI if the power saving feature was related in any way to adaptive DSP care. I haven't got an answer yet - so it may be the answer is No.

On the other hand maybe they're waiting for the Flash Memory Summit (in 3 weeks time) before they say more about their adaptive write DSP IP roadmap.

LSI/SandForce have shipped over 10 million SSD controllers - since 2010 - and they're currently shipping over 1 million per month.


Seagate chooses DensBits for TLC and 1Xnm

Editor:- June 25, 2012 - Seagate announced today it will use DensBits's flash care technology in the design of forthcoming consumer and enterprise SSDs.

Seagate has also made an equity investment in DensBits.

Editor's comments:- I've already written more than enough about about this technology trend recently on the home page.


Hynix acquires DSP SSD IP company LAMD

Editor:- June 20, 2012 -SK Hynix today announced it has entered into an agreement to acquire California-based storage solution company Link_A_Media Devices.

The reason for the acquisition should be clear if you read the article on my home page yesterday about the new generations of adaptive SSD controllers. The roadmap for flash memory is dependent on these technologies to enable workable SSDs.


new article - adaptive flash care IP (including DSP)

Editor:- June 19, 2012 - A few months ago I promised readers that I would publish a tentative list of SSD companies who use what I loosely called "adaptive DSP technologies in SSD IP" in their new designs. Here it is.


does ReRAM have role in hybrid enterprise SSDs?

Editor:- June 15, 2012 - A research group led by Professor Ken Takeuchi at Chuo University in Japan has published results of using ReRAM in a hybrid design with flash which can reduce power consumption by an order of magnitude and increase the operating life by 7x according to -an article in Nikkeibp.co.jp. The research is looking at implications for enterprise SSD designs.


LAMD launches 90K IOPS SATA SSD controller

Editor:- June 11, 2012 -Link_A_Media Devices today launched a fast new SSD controller aimed at the SATA SSD market.

The LM87800 can deliver 90K sustained random R/W IOPS and 550 MB/s sustained sequential throughput using a 6Gb/s SATA host interface.

The company says its eBoost SSD technology uses proprietary adaptive DSP techniques coupled with powerful on-the-fly error correction technology.

With 8 NAND channels supporting the high-speed ONFi 2.3 and Toggle 1 flash interfaces, the LM87800 can access up to 1TB of commodity NAND flash while also cost-effectively supporting lower capacities.


Buffalo puts MRAM into SSD cache

Editor:- May 21, 2012 - Buffalo Technology is using a hybrid nvm approach in a new design of SSD - according to a report in Tom's Hardware - which says the company will use MRAM in its cache.

Editor's comments:- this was anticipated in my 2008 article - the Flash SSD Performance Roadmap.

The RAM cache flash ratio in SSDs varies from close to zero (skinny) upto 100%.

More RAM makes it easier for designers to meet symmetry goals which are desireable in some applications - but it also creates additional cost and complexity in the sudden power loss management subsystem.

RAMlike NVMs such as MRAM aren't a golden bullet either - but by compressing the time window required to maintain holdup for critical save operations from milli-seconds to microsends (and cleaning up the state on the next restart) such chips can enable a smaller footprint than other approaches.

At the other end of the spectrum - designers of skinny cache controller architecture can achieve the same in-system apps results with virtually no RAM. So - as usual in SSDs - you will see a diversity of approaches in competing SSDs. They aren't all going down the same path - even if the destination looks the same.


DensBits samples new TLC flash controller

Editor:- April 30, 2012 - DensBits today released a new SSD controller - the DB3610 - which supports the latest 2Xnm and 1Xnm TLC (3 bits/cell ) MLC flash with an extreme endurance figure of more than 10K P/E cycles and R/W performance of up to 95MB/s / 65MB/s and 4,000 / 1,100 R/W IOPS (4KB), for sequential and random operations, respectively.

DB3610 employs DensBits' Memory Modem technology (adaptive DSP in SSD IP) which enables a native TLC solution with more than double the endurance of 2 bits/cell (MLC), and near-MLC R/W performance.

Editor's comments:- It's easy to miss the significance of new SSD products and technologies. And you might think from looking at the text and numbers above - this is a consumer style SSD controller - and it's not for me.

But I think DensBits may become one of the top 20 SSD companies real soon - unless it gets acquired before that happens. Its flash technology has very high roadmap symmetry and the potential to impact competitiveness in the consumer, embedded and fast-enough enterprise SSD markets with a splash that's as big as SandForce made when it emerged on the scene 3 years ago. You can read more in Who's who in SSD? - DensBits.


SandForce driven SSDs get 5x SMARTer

Editor:- April 26, 2012 - I recently learned that SMART has figured out a way to get 5x more endurance from consumer flash when using unmodified industry standard controllers from LSI/SandForce. This is discussed in more detail in archived SSD news.


how fast can your SSD run backwards?

Editor:- April 20, 2012 - StorageSearch.com today published a new article which looks at the 11 key symmetries in SSD design.

Whether you're a buyer, designer, marketer or investor in SSDs - this new conceptual framework will help you to comparatively evaluate any SSD compared to competitive offerings. It's helpful whether you're looking at raw SSD IP and controller chips right up to the most complex datacenter SSD racks.

SSDs are complex devices and there's a lot of mysterious behavior which isn't fully revealed by benchmarks and vendor's product datasheets and whitepapers. Underlying all the important aspects of SSD behavior are asymmetries which arise from the intrinsic technologies and architecture inside the SSD.

Which symmetries are most important in an SSD? - That depends on your application. But knowing that these symmetries exist, what they are, and judging how your selected SSD compares will give you new insights into SSD performance, cost and reliability.

There's no such thing as a perfect SSD in the market today - but the SSD symmetry list helps you to understand where any SSD in any memory technology stands relative to the ideal. And it explains why deviations from the ideal can matter.

The new article unifies all SSD architectures and technologies in a simple to understand way. Now that I've spent 20 years thinking about it - it all seems really obvious now. This is the most important article about SSDs that I've written in the past few years. But I couldn't have written it before. I hope you like it. ...click to read the article


Dataram monetizes hybrid caching SSD ASAP IP

Editor:- April 4, 2012 - Dataram today announced it has sold its patents portfolio related to solid state storage and SSD ASAPs for $5 million to Phan Tia Group.

Dataram retains a license to continue to use the patents in current and future Dataram products including XcelaSAN with limited rights to transfer its license. ipCapital Group assisted in patent valuation, and supported Dataram on the negotiation and successful close of this transaction.

Editor's comments:- this is a good deal for Dataram. This way they retain their stake in the high availability FC SAN RAM end of the SSD ASAP market - and get some cash to pursue growth ideas. The XcelaSAN has been aimed at niche segments in the enterprise SSD market - but could take off in new directions with the appropriate marketing investment.


new Marvell SSD controllers will accelerate Ultrabook masses

Editor:- March 14, 2012 - Marvell today announced mass design wins for its new high speed 6Gbps SATA SSD controller - the 88SS9187 which supports regular RAM cache (upto 1GB) and upto 500MB/s R/W even at dirty drive conditions.

It supports on-chip RAID technology for the NAND device with flexible customer firmware based algorithms to optimize retiring of defective NAND block, plane, die or device and has the lowest power consumption of any controller in this performance class.


NeoMagic demos FPGA simulation of USB MagicVault controller

Editor:- February 27, 2012 - NeoMagic today announced that the company is ready to demonstrate MagicVault, its USB 3.0 based UFD USB Flash Drive Controller solution on an FPGA platform.


SMART-inside SAS SSDs - offer credible competitive alternative for tier-1

Editor:- February 22, 2012 - SMART Storage Systems launched the Optimus Ultra (a 1.2TB 2.5" 100K/60K IOPS, 500MB/s R/W SAS SSD) which uses the company's new, in-house developed, high reliability enterprise SSD controller IP - which includes DSP and adaptive programming techniques to deliver industry leading SSD data integrity and upto 25x / day full disk writes for 5 years endurance - while using low cost consumer grade MLC.

...Later:- - "The new controller learns from each chip the best way to handle it - and can even use different parameters in different parts of the chip and at different points in time too." - from Who's who in SSD - talking to SMART's President - John Scaramuzzo (Feb 28, 2012)


VIA chooses Tensilica core for new SSD controller

Editor:- February 15, 2012 - Tensilica today announced that VIA has selected Tensilica's Xtensa dataplane processors (DPUs) for a new design of SSD controllers.

After conducting a technical evaluation, VIA determined that Tensilica's DPUs provide over 4x the performance of competing processors on key algorithms used to benchmark competitive alternatives.

With conventional processors, increasing the clock speed is the common way to increase SSD IOPS. However this increases energy consumption and die size, especially as speeds increase so much that designers are forced to move to more complex multi-core solutions.

Tensilica says its DPUs allow designers to customize the IP core, mix both control and signal processing, and add high-bandwidth connectivity to increase performance without increasing the clock speed.

For example, designers can use single-cycle bit field manipulation and arithmetic instructions along with multiple simultaneous single-cycle table lookups to achieve over 10x the efficiency of other processors. This not only increases IOPS, but also significantly reduces the energy consumed and the complexity of the SOC design itself.

Editor's comments:- There's a good precedent for this. When SandForce came to market in April 2009 - their CEO (at that time) Alex Naqvi told me their controller used the dataplane processors from Tensilica.


Rambus gets into the nv memory IP market

Editor:- February 6, 2012 -Rambus today announced it has acquired Unity Semiconductor for an aggregate of $35 million in cash.

As part of this acquisition, the Unity team members have joined Rambus to continue developing innovations and solutions for next-generation non-volatile memory.

"At Rambus, we are creating disruptive technologies to enable future electronic products," said Sharon Holt, senior VP and GMof the Semiconductor Business Group at Rambus. "With the addition of Unity, we can develop non-volatile memory solutions that will advance semiconductor scaling beyond the limits of today's NAND technology. This will enable new memory architectures that help meet ever-increasing consumer demands."


Intel's fastest SSD uses SandForce inside

Editor:- February 6, 2012 - Intel today announced it has used SandForce controllers for the first time in its new (and fastest) SATA 3 2.5" SSD - the Intel SSD 520 - which (with upto 80K R/W IOPS peak - 4KB) is aimed at gaming, CAD and graphics content creation markets.

"We worked closely with Intel to leverage their deep understanding of the NAND flash, ultimately providing a unique and optimized solution for client computing applications with the LSI SandForce Flash Storage Processor," said Michael Raam, VP and GM of LSI's Flash Components Division.


Violin video re visibility advantages of home grown controllers

Editor:- January 23, 2012 - I commented recently that the top 10 SSD companies in Q4 2011 all had one thing in common (apart from the fact they make SSDs) - they all had their own proprietary SSD controller architecture which they could use to optimize products for some application markets (even if some of them also used other controllers too).

In a recent video - Violin's, CTO Software Jonathan Goldick talks about the benefits they get from having their own controller.

I like it because it also echoes themes I discussed last year in my big versus small SSD architecture article - and also because it's short - less than 250 seconds. ...watch Violin's SSD video


BiTMICRO's new SSD controller nearly ready

Editor:- January 17, 2012 - BiTMICRO has named its new SSD controller - which has just gone through tape-out.

It's called TALINO-DE - Translation and Linking of I/O Nodes -Device Edition. - Not very catchy - but all the best SSD names have gone.

The multi-core TALINO-DE is big SSD architecture (manages hundreds of flash chips) and includes full data path protection, end-to-end data integrity, embedded AES engines for data security, embedded XOR engines for delivering faster transaction processing in RAID configurations, power management, and other resource optimization.

Editor's comments:- the new controller appears to be in a similar conceptual class to those which have been shipping in some PCIe SSDs from TMS and Virident for example - although these in turn are very different - starting at the RAM cache basics (TMS designs range from regular to fat, whereas Virident is skinny.)

If the new BiTMICRO controller lives up to its promise - and if it's marketed as a merchant chip set - it could lead to a commoditization of PCIe and rackmount SSDs similar to the effect SandForce had on the enterprise 2.5" SSD market.


NVMe compliant IP core aims at PCIe SSD designers

Editor:- January 6, 2012 - IP-Maker released a data transfer manager core - for use in PCIe SSD designs fitting between the media and the flash controller. The design is compliant with the NVM Express specification.

PCIe SSD manufacturers will benefit from a performance increase thanks to the IP-Maker NVMe IP core says Mickaël Guyard, Product Marketing Director at IP-Maker. This efficient DMA manager ensures the data flow up to the NandFlash, therefore off-loading the motherboard CPU.


Viking ships nv 8GB DDR3 DIMM

Editor:- October 18, 2011 - Viking said it is shipping an extension of their nv module range.

The DDR3 ArxCis-NV plugs into standard RAM sockets and provides 2GB to 8GB RAM which is backed up to SLC flash in the event of a power failure - while the memory power is held up by an optional external 25F supercap pack. Viking says these new memory modules can eliminate the need for battery backup units in servers and the maintenance logistics associated with maintaining them. They are specified as being maintenance free for "5 years @ 60C".

Editor's comments:- will these new modules replace batteries in RAM SSDs? - I doubt it - because of scalability issues - like managing a spiderweb of 100+ dangly bits of wire when you have a terabyte of RAM. Having said that - there are many applications which only use a small number of memory chips which could benefit from such a product.


Hybrid Memory Cube will enable Petabyte SSDs

Editor:- October 7, 2011 - Samsung and Micron this week launched an new industry initiative - the Hybrid Memory Cube Consortium - which will standardize a new module architecture for memory chips - enabling greater density, faster bandwidth and lower power.

"HMC is unlike anything currently on the radar," said Robert Feurle, Micron's VP for DRAM Marketing. "HMC brings a new level of capability to memory that provides exponential performance and efficiency gains that will redefine the future of memory."

Editor's comments:- HMC may enable SSD designers to pack 10x more RAM capacity into the same space with upto 15x the bandwidth, while using 1/3 the power due to its integrated power management plane.

The same technology will enable denser flash SSDs too - if flash is still around in 3 years' time and hasn't been sucked into the obsolete market slime pit by the lurking nv demons which have been shadowing flash for the past 10 years and been waiting for each "next generation" to stumble and be the last.

The power management architecture integrated in HMC and the density scaling it allows for packing memory chips (without heat build-up) are key technology enablers which were listed as some of the problems the SSD industry needed to solve in my 2010 article - this way to the Petabyte SSD.


How big was the thinking in the SSD design?

Editor:- July 5, 2011 - Why size really does matter in SSD design architecture is a new article recently published on StorageSearch.com

For designers, integrators, end users and investors - understanding what follows from simple Big versus Small architectural choices predicts a lot of important consequences. ...read the article


flash SSD capacity - the iceberg syndrome

Editor:- June 22, 2011 - have you ever wondered how the amount of flash inside a flash SSD compares to the capacity shown on the invoice?

StorageSearch.com recently published a new article - flash SSD capacity - the iceberg syndrome .

What you see isn't always what you get. There can be huge variations in different designs as vendors leverage capacity to tweak key performance and reliability parameters. ...read the article


what happens in SSDs when power goes down? - and why you should care

Editor:- February 24, 2011 - StorageSearch.com today published a new article - SSD power is going down! - which surveys power down management design factors in SSDs.

Why should you care what happens in an SSD when the power goes down?

This important design feature - which barely rates a mention in most SSD datasheets and press releases - is really important in determining SSD data integrity and operational reliability.

This article will help you understand why some SSDs which work perfectly well in one type of application might fail in others... even when the changes in the operational environment appear to be negligible. If you thought endurance was the end of the SSD reliability story - think again. ...read the article


new book - Inside NAND Flash

Editor:- November 17, 2010 - Forward Insights (an SSD analyst company) is one of the contributers to a new book called - Inside NAND Flash Memories.

The publishers say that SSD designers must understand flash technology in order to exploit its benefits and countermeasure its weaknesses. The new book is a comprehensive guide to the NAND world - from circuits design (analog and digital) to reliability.


pushing the SSD testing rock farther up the hill

Editor:- August 25, 2010 - I'm mostly resistant to the idea of rehashing recent news stories - but yesterday while talking about new SSD technologies a reader asked me to take another look at SNIA's SSD performance testing guidelines - which I reported on a month ago.

I said I had been surprised it took ORGs like SNIA so long to look at these issues - because I had been aware of "Halo effects" in flash SSD benchymarks for years - and commented - "But I guess member led ORGs have a built in lag factor and only move at the speed of the slowest exec members."

The reader - Neal Ekker - whom I knew from his time at Texas Memory Systems - put up a spirited defense for this particular ORG opus and said...

""...We've all known about the fishy-ness of SSD performance claims for years. But I'd like to draw attention to what an impressive accomplishment the SNIA SSS PTS represents, no matter its technical merits or ramifications. I watched it happen, and I can tell you it was an amazing POLITICAL achievement. And I don't mean that in a negative way. Any time there's more than one person in a room, there's politics. For a collection of engineers representing both their own egos and the interests of their employers to finally agree on even this rather bare-bones beginning standard was just remarkable to observe. I can't begin to give enough credit to some of the chief movers and shakers.

Neal Ekker added - "This is why I want more attention focused on the SSS PTS right now, so we don't lose momentum entirely. There's still plenty of work to be done. We need additional companies and fresh faces and energies to step up and push this rock a little farther up the hill."

Editor's comments:- During the majority of the SSS PTS development Neal Ekker served as the SNIA SSSI Education Committee Chair. He's now a for-hire independent SSD marketing consultant. ...Neal's bio, ...SSS PTS (pdf), Storage People
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Why should you care what happens in an SSD when the power goes down?

This important design feature - which barely rates a mention in most SSD datasheets and press releases - has a strong impact on SSD data integrity and operational reliability.

This article will help you understand why some SSDs which (work perfectly well in one type of application) might fail in others... even when the changes in the operational environment appear to be negligible.
image shows Megabyte's hot air balloon - click to read the article SSD power down architectures and acharacteristics If you thought endurance was the end of the SSD reliability story - think again. ...read the article
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...Emanuele Verrelli and Dimitris Tsoukalas, in their chapter called Radiation Hardness of Flash and Nanoparticle Memories - in the multi-author free online book Flash Memories - published in September 2011 by InTech

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