by Zsolt Kerekes,
Controllers and IP define the personality of the SSD.
architecture and effective implementation processes (including manufacturing,
logistics and software) transform unreliable me-too
memory chips into the
diverse range of application optimized (or not) SSDs which you can see in the
SSD endurance myths
interface glue chips and IP
how fast can your SSD
Why size matters in
SSD design architecture
and DSP ECC IP for use in flash SSDs
|What were the big
SSD ideas to learn and unlearn in 2015?|
controller news - here on StorageSearch.com
|data noise reduction
techniques in nvm|
Editor:- April 22, 2016 - A recently published
Methods for Non-Volatile Memories (145 pages, $130) cowritten by Lara Dolecek
and Frederic Sala
University of California, provides an overview of recent developments in
coding for nvms, and, by presenting numerous potential research directions, may
inspire other researchers to contribute to this timely and thriving discipline.
comments:- this appears to be focused on the DSP and ECC end of the
flash care management & DSP IP revolution which during the last 4 years
or so has been changing the way that new
memory technologies with
poor intrinsic data integrity (high noisiness - when viewed from a classical
ECC data angle) can be upcycled to construct higher quality, more reliable
solid state storage by adaptive and interventionist coding strategies.
2 ASIC roles for PCIe based BiTMICRO SSD controllers
March 25 , 2016 - 5
years ago when BiTMICRO
unveiled an earlier generation of its high performance enterprise SSD
controller architecture - it was clear that their preference was for a chipset
which included 2 different types of functionality.
This kind of
thinking wasn't unique at that time - as I'd seen similar things in
designs before but (unlike BiTMICRO) those other designs were captive and not
offered as COTS SSD
How many controller chips do you really need for a
a new blog
today BiTMICRO explains why its current generation of controllers continues
using a 2 ASIC architecture with one acting as a flash array extender and the
other as the main PCIe host interface controller.
Among other things
the blog says "To increase flash channel bandwidth and capacity, more flash
channel expander chips can be instantiated and connected to the main controller."
As noted in the SSD
design heresies - SSD vendors often have different implementation
architecture approaches which compete in similar application slots. When
evaluating different types of offerings it can be useful to ask yourself - which
direction is my own design likely to stretch in future? (Towards more
performance? lower cost? bigger scale? adjacent application role? etc.)
BiTMICRO's blog clarifies where they see their strengths in the market. ...read the
Hyperstone samples new industrial USB SSD controller
February 15, 2016 - Hyperstone
is sampling a new USB 3.1 Flash memory controller - the
- in a TFBGA-124 package - for industrial applications.
things the ECC engine can correct up to 96-Bit/1KB. Power management features
include automatic power-down during wait periods for host data or flash memory
operation completion and automatic sleep mode during host inactivity periods.
comments:- As you'd expect from a
USB device it's not
intended for heavy write applications - and although some of the data integrity
features are suggested to be enterprise compatible - the sustained random write
speed for 4KB is 5MB/s (30x slower than the peak sequential write.)
- given the portability of strategic applications and system software between
form factors and the convenience of
DWPD as a way of grouping
SSDs for different roles I asked Hyperstone if they can supply an indicative
range of DWPD for the new USB controller (when used with various classes of
memory and DRAM size). I got this answer from Axel Mehnert VP
Marketing who said this.
"Yes, we can give you such ratings
Hyperstone has a web based lifetime estimation tool which can be accessed by
registered users of our site. There you can play with several settings and
Flash configurations in order to get DWPD data also correlating to several
different access patterns."
new SSD Bookmarks by Cadence
Editor:- February 5,
2016 - You all know Cadence
So what set of online resources do you think they'd recommend
to newcomers who want to learn more about SSDs? (BTW - Rules of this game
disallow mouse links in the mix.)
You don't have to guess. I asked.
And you can see
suggested SSD Bookmarks today in the
Marvell is first to ship Host Memory Buffer feature in NVMe SSD
Editor:- January 5, 2016 - Marvell today
expansion of its NVMe SSD controller technology to support Host Memory Buffer
(HMB), an NVMe revision 1.2 feature enabling DRAM-less (skinny) flash
SSDs to use host memory and achieve performance comparable to SSD designs with
regular embedded DRAM but
at much lower cost and power consumption.
3 new educational flash blogs
Editor:- December 11,
2015 - Here are some flash SSD blogs I've seen this week which are aimed
at educating SSD specifiers in embedded markets.
in LDPC based SSD Controllers - from PMC-Sierra -
includes clear explanations about some of the read again (re-read) recovery
strategies which can be used as part of the tool set in
and DSP ECC when things go wrong.
For example - "Read the
same section as the original hard data but use a different set of read threshold
voltages inside the NAND."
These techniques are rarely shared
publicly in such detail and are real life optimizations unlike the imaginary
techniques I discussed in my 2011 fictional company profile of
101 - Everything You Ever Wanted to Know - aimed at newcomers to the
concepts and jargon in
is a new framework overview from Cactus Technologies
which links together a bunch of their earlier short blogs. These articles
include good diagrams of flash planes, controllers and cells.
title "SSD 101 etc" - how far it satisfies "everything"
you want to know is debatable. But if you're starting out in flash and need the
reassurance that the technology background is sound - this series is better
than many others I've seen.
Processors in SSD controller design - a new series
October 12, 2015 - Coming soon on the mouse site - a new series...
SSD design - processors used in SSDs. This is for those of you who
know in your bones that to get the SSD you want - you need to design your
PMC-Sierra agrees to be acquired for $2 billion
October 6, 2015 - PMC-Sierra
has agreed to be acquired by Skyworks
for $2 billion it was
Specifically, we plan to leverage PMCs innovative storage
systems, flash controllers, optical switches and network infrastructure
solutions to expand our engagements with some of the worlds leading OEMs and
ODMs as well as
data center customers said David J. Aldrich,
chairman and CEO of Skyworks.
Micron acquires stealth mode NVMe SSD controller company - Tidal
Editor:- October 3, 2015 - Micron has acquired
Tidal Systems (a stealth mode
controller company whose home page has the statement "Enabling PCIe NVMe
Flash Storage Development" according to a news report by Tom's
Hardware which suggests that the acquired company's controller
technology is adaptive
Editor's comments:- In June 2015 I summarized the
weaknesses of Micron's flash controller technology and commented on the oddity
of its not having made any significant enterprise
in the preceding 12 to 18 months. In which I said "Micron's enterprise
storage strategy has not met the basic needs of Micron as a memory company. It
doesn't have any strong SSD architectures and systems roadmaps of its own."
- in the same article in
a February 2014 note - I wrote about "Micron's DIMM SSD accelerator
product gap / opportunity / threat"... That was recently addressed with
the recent announcement of Optane.
So that leaves just one main
outstanding action on the future Micron "to do list" - from the SSD
analysis in their profile page here on the mouse site - the acquisition of a
rackmount SSD reference architecture or product line.
Datalight's SSD firmware to go into manned spacecraft
September 17, 2015 - Datalight
today announced that its embedded filesystem (Reliance
Nitro) and FTL (FlashFX
Tera) have been selected by NASA for use
onboard future manned spacecraft being developed as part of the
Mirabilis discusses role of deployment level simulation to
optimize reliability delivered by SSD controller design tweaks
August 16, 2015 - "A diligent system designer can extend the life of an SSD
by upto 60% by proper control of over-provisioning, thus reducing TCO"
Design in his recent paper
the Lifetime of SSD Controllers (pdf) which discusses the role of
application and deployment level simulations to explore the impact of
changing brews in controller
overprovisioning articles 2003 to 2015
the most significant development in the enterprise flash market
in the past 3 years
Editor:- August 13, 2015 - "Diablo's
Memory1 is the most significant development in the enterprise flash market in
the past 3 years."
That was my assessment of the recent
by Diablo of its
which repurposes non volatile nand flash as volatile RAM.
not strictly speaking an SSD technology this stretch and repurposing of
standard industry flash reveals that
was not the end of the enterprise flash controller innovation story. The new
product, technology and competitors are discussed in a blog on StorageSearch.com -
DIMM wars in
SSD servers how significant is Diablo's Memory1?
Altera launches adaptive DSP controller for PCIe SSD market
June 23, 2015 -Altera
availability of a new flash controller reference design for the
NVMe PCIe SSD market
which uses adaptive
writes and DSP ECC.
10 SoC (pdf) which includes among other things an integrated dual-core ARM
processor uses flash IP from
Mobiveil and NAND
optimization software from NVMdurance
to simplify the design of gen 3 PCIe SSDs having 7x better endurance
than classical non adaptive designs.
Since the market criticality of adaptive DSP flash controller techniques for
enterprise SSDs began to emerge in 2011 and then clarified in a big way in
2012 - it has become an essential capability for most product lines. This
standard product from Altera fills a much needed gap in their offerings.
A useful resource guide of data compression techniques in memory
Editor:- May 26, 2015 - Inside the
SSD controller brain
the compressibility of data is one of the tools which can go into the mix of
optimizing performance, endurance and competitive cost.
A recent paper
Survey Of Architectural Approaches for Data Compression in Cache and Main Memory
Systems by Sparsh Mittal
and Jeffrey S. Vetter in
IEEE Transactions on Parallel and
Distributed Systems - reviews the published techniques available and places
their relevance in the context of real and future memory types and applications.
The survey covers applications from embedded systems upto supercomputers. In
addition to being useful resource directory of related papers the article
gives you a brief description of many compression techniques, where you might
use them and what benefits you might expect.
list of articles and
books by Sparsh Mittal which among other things covers caching
techniques, reliability impacts and energy saving possibilities in a wide
range of server architectures.
Stealth mode Liqid gets seed funding for NVMe related IP
May 20, 2015 - Liqid
announced that it has
secured $5.7 million in seed funding led by
Phison Electronics, ABR
Capital Management, and additional investments aggregated by DH Capital.
financing round will be used to advance research and development as well as to
help accelerate time to market.
new power fail safe file system for tiny memory IoT
May 5, 2015 - Datalight
a preview version of
Edge, a power
fail-safe file system for FreeRTOS
which allows developers building IoT devices to reliably store and quickly
access data in embedded
SSDs. It requires as little as 4KB of RAM and 11KB of code size.
0 to 3 seconds in 2.5" MIL SSDs
24, 2015 -
be or not to be? hold up capacitors in 2.5" MIL SSDs - 2 extreme
opposite approaches in current products are discussed in my new blog on StorageSearch.com
Northwest Logic provides FPGA support for Everspin's MRAM
February 9, 2015 - Northwest
controller support for Everspin's
ST-MRAM - with interoperability proven on a Xilinx Virtex-7 FPGA platform.
MRAM's core IP also supports traditional volatile DDR3 SDRAM - so the
new support for MRAM will simplifiy the design of
protected low latency
Mobiveil supports Spansion's HyperBus NOR
Editor:- February 3, 2015
- Mobiveil today
it will provide authorized controller support for Spansion's
flash chips are low capacity, low pin count, faster (5x) NOR flash (BGAs)
suited for some applications in the automotive electronics market.
HyperBus flash interface
IP (pdf) delivers upto 333MB/s using this 12-pin interface.
Marvell's new skinny controller will enable BGA PCIe SSDs
December 9, 2014 - 3 of the most significant differentiating factors in
flash SSD controller
In the past year or
so - we've seen a few companies - whose controller products have long been
distinctly at one end of each of the above categories - introduce new designs
which can operate in the other. This is a competitive response to the
realization that any single architecture is better suited for some applications
rather than others and no single design set is best for all markets.
- whose controllers have always until now been firmly in the regular RAM flash
cache category -
it now has IP which enables it to play a significant part in skinny RAM flash
cache designs with 2 new controllers:-
- Marvell's 88NV1140 - aimed at
NVMe PCIe Gen3x1 SSDs
- can work with 15/16nm TLC and 3D NAND and needing no external DRAM -
will simplify the design of smaller form factors including the capability of
BGA PCIe SSDs.
- Marvell's 88NV1120 - aimed at the embedded
SATA SSD market which
supports DevSlp - won't by itself create new markets - but will - due to its
small footprint and memory support - lower the cost barriers for greater
adoption of small SATA SSDs in traditional
new edition of the Top SSD Companies
December 4, 2014 - Diablo
Technologies and PLDA
have appeared for the first time on the new edition of the Top SSD Companies -
based on market metrics in
Q3 2014 .
Memblaze uses PMC's NVMe controllers
December 1, 2014 - PMC-Sierra
Flashtec NVMe controllers in its next-generation PBlaze4
Toshiba orders 1 million SSD controllers this quarter from Phison
October 7, 2014 - A
report on Digitimes
says that Toshiba
has ordered "about one million"
SSD controllers from
delivery in the current quarter.
Editor's comments:- You can
get an idea of who else uses Phison's
Kingston etc) - and for what purposes - on
CoreRise reveals who it's talking to - about future SSD IP
September 24, 2014 - I've noticed some
news updates recently from CoreRise.
singly the content appears lightweight and more like tweets than the
usual kind of news I would write about on this page - but when viewed as a
total set they give a useful picture of technology directions at CoreRise.
In the space of single week CoreRise reported visits from
Seagate (re SF3700
controllers), Micron (re
flash memory), SMI
(re controllers) and also JMicron
CoreRise also made a refreshingly candid comment
about its own attitude to the kind of reference designs which
SSD controller makers
typically offer SSD oems as a quick to market route to market.
said that due to quality considerations - and its own expertise - "as a
rule, CoreRise never uses the reference design due to potential defects. In
the past CoreRise has found critical bugs in almost every such solution."
Silicon Motion has fastest UHS-II SD card controller
September 17, 2014 - Silicon Motion
the SM2704 which the company says is the world's fastest single-channel
UHS-II SD card
controller solution (aimed at the professional photography and video
recording market) with a maximum R/W read speed of up to 280MB/s and 260MB/s
"Silicon Motion is the #1 merchant supplier of
UHS-I/II card controllers, which are the majority of our overall SD card
controller sales" said Wallace Kou,
President and CEO of Silicon Motion.
Seagate completes acquisition of LSI's SSD business
September 2, 2014 -
it has completed its previously announced acquisition of the assets of LSI's Accelerated
Solutions Division and Flash Components Division from Avago Technologies.
eASIC supports Mobiveil's NVMe platform
August 6, 2014 - eASIC
announced support for Mobiveil's
NVMe platform (pdf)
implemented in eASIC devices.
The platform includes PCI Express, NVM
Express, DDR3 and NAND flash controllers, IP that is optimized to take advantage
of the unique eASIC Single Mask Adaptable ASIC technology.
enabling the rapid deployment of SSD technology at substantially lower cost and
up to 70% lower power than alternative solutions, said Jasbinder Bhoot,
VP of Worldwide Marketing at eASIC. By working with Mobiveil, customers will
have access to a complete NVMe solution running in cost, power and performance
optimized eASIC devices.
See also:- Shorten Time to Market
for NVM Express based storage solutions (pdf by Mobiveil)
Silicon Motion samples controller for TLC SATA SSDs
August 5, 2014 - Silicon
that it is sampling the SM2256, the worlds first complete merchant
ASIC/firmware SATA 6Gb/s SSD
controller solution supporting 1x/1y/1z nm triple-level cell (TLC) NAND from
all major NAND suppliers.
We expect TLC SSDs to account for more than
40% of all client SSD shipments in 2015, said Michael Yang,
Senior Principal analyst at IHS
iSuppli. The combination of cost effective TLC NAND and new controllers like
Silicon Motions SM2256 will help drive this level of adoption.
NxGn Data exits stealth with promise of in-situ SSD processing
July 29, 2014 -
NxGn Data today
exited stealth mode.
NxGn will use
adaptive DSP technology to enable small form factor SSDs (such as
M.2) aimed at the enterprise
market - using MLC and TLC down to 1z-nm geometries.
Fully functional FPGA-based samples will be available in early 2015,
followed by final production samples of SoC-based M.2 solutions in late 2015.
says it will be the first SSD controller company in the industry with
in-storage computation capability - what it calls "In-Situ Processing".
comments:- Earlier this year I published a couple of reports and mentions
about SSD suppliers (LSI
and Memblaze) who
have modifed their controller firmware to eliminate or bypass functions from the
lowest level SSD drive - for large customers like Baidu - who then use their
array level software to get better utilization and performance.
market InnoDisk - uses
what it calls 3rd generation architecture - to partition intelligent data
actions between the controller and software stack.
Until recently -
only Fusion-io (in
whose products the flash controller and apps server - share the same CPU cores)
has been able to maximize high end context intelligence with low level flash
block data access at a similar latency level.
But once you've solved
the problem of making SSDs reliable and fast - it's tempting to create an SSD
instruction set which which focuses on application layer needs too - and not
just those of dumb storage.
Flash: Towards Energy-Efficient, In-Situ Data Analytics on Extreme-Scale
SanDisk agrees to buy Fusion-io
Editor:- June 17,
2014 - What will SanDisk
really get from Fusion-io?
- more usable flash petabytes out from the same raw wafer starts - due to better
architecture. ...more in
PLDA enters the PCIe SSD controller market with 6.6 Gb/s NVMe
Editor:- June 9, 2014 - PLDA today
immediate availability of a new
SSD controller aimed
at the PCIe SSD market.
IP is a high performance, low latency, highly-configurable PCI Express 3.0
soft IP supporting endpoint, root port, switch and bridge configurations. The
design has been engineered for both ASIC/SoC and FPGA implementations.
comments:- PLDA has written a product description -
challenges of PCIe with NVMe in order to deliver highly competitive Enterprise
PCIe SSDs (pdf) - which contains an overview of the design. Here are some
- power saving features? - PLDA implements L1 PM Sub-states, reducing power
consumption without affecting performance.
Here are some questions I put to the
- performance? - 270K write IOPS, 12µS write latency write (4KB) using
the FPGA-based reference design.
- is there a minimum order quantity or cost associated with licensing your
No minimum quantity.
- What is your deliverable?
An Encrypted Source code file that can
be downloaded or sent on CD
- How does a customer evaluate your IP?
We provide 1 month Free Evaluation IP
SMI supports 16nm nand with new SATA SSD controller
June 4, 2014 - Silicon
support for Micron's
16nm 128Gb nand flash
SATA 3 SSD controller which enables 67K / 65K R/W IOPS (4KB) while also
enabling low power designs (2mW DevSleep mode and 21mW Slumber mode).
Seagate agrees to acquire LSI's SSD business
May 29, 2014 - Seagate
today announced it will acquire the assets of LSIs Accelerated
Solutions Division and Flash Components Division from Avago Technologies for $450 million in
The transaction is expected to close in the 3rd quarter of calendar
year 2014, subject to regulatory approval.
Editor's comments:- Have you wondered... why didn't it cost
more? (That tells you something about the state of the SSD market.) And what
will happen to the supply of SF controllers?
...read more in
Hyperstone samples new industrial controller for high integrity
USB 2 SSDs
Editor:- May 26, 2014 - Hyperstone today
that it has begun sampling controllers for
USB 2 SSDs aimed at low
power, high reliability and long data retention applications in the
Hyperstone says its U8 USB controller (available as probed die and
in a QFN-76 package) works with SLC and 1x nm MLC.
Marvell samples controller for SATAe SSDs
May 21, 2014 - If you're designing SATA Express SSDs then Marvell today
it is sampling the 1st SSD
controller specifically designed for the SATAe market - which will
enable the design of 2.5"
PCIe SSDs at costs which could be
fast SATA SSDs.
88SS1083 is a 2 lane PCIe Gen2 SSD controller with transfer rates up to
1GB/s. It supports DevSleep and L1.2 PCIe low power state - to minimize power
consumption in notebook
and enterprise array
environments. Its flash management scales down to 15nm NAND.
PMC blog discusses latency implications of DSP ECC IP in SSD
Editor:- May 15, 2014 -
in LDPC-based Next-Generation SSD Controllers is a new blog by Stephen Bates,
Technical Director, PMC
who says - "The variability of the LDPC decode time is a function of how
many iterations it takes to decode the data from the flash."
his article Stephen says that the minimum number of iterations is 1, typical
is 4 and maximum is 20.
To relate that to latency - he says assume for
sake of illustration that each iteration takes a microsecond.
comments:- you can see how those numbers can start to stack up and make
inroads into the design of fast
one of the reasons you've got so many
different generations of
flash memory circulating in the same market today.
The higher the
capacity of the SSD - the greater the economic incentive to use newer smaller
flash geometries. But those require more complex controller management (to
integrity) so that incurs greater design complexity and NRE.
market is the enterprise - but these DSP flash concepts are used in industrial markets
too. In fact that's where they originated. Bu in industrial SSDs it can still
be sometimes cheaper
to deploy more expensive SLC memory in low capacity designs - due to the
simpler requirements of the associated controller technology and therefore also
lower demands for
power hold up
PS - in an earlier blog in this series - Stephen Bates
(whose PhD was in signal processing) - revisits the reasons why the
SSD market needs
to consider the design freedoms which come from using complex DSP flash IP -
gives examples of the tradeoffs. Such as 50% better
with LDPC codes using identical flash - or gaining
capacity by using weaker codes.
BTW the industry changing
possibilities of these technologies for reshaping the economies of SSDs were
reviewed in my 2012 article -
flash care management & DSP IP in SSDs What is it? Who does it? and why?
FPGA as ASIC - efficiency perspectives
28, 2014 - The merits of FPGA versus ASIC in
SSD controllers comes
up from time to time on these pages.
The clearest analysis of the
advantages of FPGA versus ASIC (based on silicon footprint) that I've seen -
along with a useful historic perspective - can be seen in this article -
as ASIC Alternative: Past and Future by Zvi Or-Bach,
President and CEO of MonolithIC 3D
Zvi says - "Research shows that an FPGA can is
approximately 30x larger and between 3 to 5 times slower on average
than a standard-cell implementation. This high programmability overhead
suggests that many of the current ASIC designs cannot be replaced by an FPGA
design. Consequently, when advanced technology NRE is too high, the alternative
is to use older node ASIC technologies." ...read
are you ready to adapt to new ways of thinking about DRAM?
April 2, 2014 -
enterprise RAM doesn't
have to be boringly predictable. If adding intelligence to flash makes
better SSDs - then how about
revisiting all the
assumptions in DRAM too?
how safe are your assumptions about SLC?
March 18, 2014 -
is regarded as the "gold standard" in
nand flash memory today
when it comes to
Or maybe it would be more accurate to say - "SLC is the depleted
uranium standard" when it comes to choosing ingredients for hardening the
SSD data integrity
So you can imagine my surprise- when in a recent
conversation about the reliability aspects of SSDs - I was told about some
unique and proprietary "brutal and awkward test patterns" - which
had uncovered design flaws in a new type of SLC memory while it was being
characterized for use in SSDs.
This indicated that SSDs designed
using that memory in some applications could be killed in as little as 3 to 9
months of use.
This design vulnerability never showed up at all
in the "standard"
SSD controller test
patterns which are used throughout the industry. And their application wasn't
for an SSD accelerator - but for a regular speed
the customer point of view - if you want an embedded SSD which you can rely on
- it's nice to know that some people still design SSDs the old fashioned way -
and test every assumption along the way.
That was just one of many new
things I learned talking to Dave Merry
Conklin co-founders of a new SSD company called FMJ Storage - which has -
for the past several years been operating profitably while under the general
market radar. You can see more about what we talked about in -
Who's who in SSD? - Full Metal
ATP's industrial SSD firmware has been screened for power fail
Editor:- February 5, 2014 - ATP
today that the design qualification process of the firmware used in its new
SATA 2 SLC SSD range - the
SI-Lite - includes assessing the data integrity vulnerability to "multiple
power outage conditions during different R/W timing and the product has passed
several thousands of power cycles during the strict product qualification
process." See also:-
sudden power loss
Avago acquires LSI
Editor:- December 16, 2013 - LSI today
that it has agreed to be acquired by Avago
Technologies Limited in an all-cash transaction valued at $6.6
SSD reliability is tools deep
Editor:- November 26,
2013 - Although we often talk about
SSD controllers and
flash memory chips as
being "hardware" - none of these devices would exist if it weren't
for a rich software ecosystem of design automation and verfification tools
which have evolved to enable semiconductor system design
in the past 30
years or so.
reliability of SSDs
depends not just on the interplay of physics, architecture, electronic
factors and firmware - but just as importantly - reliability or more
accurately the dependability and determinability of any SSD design begins with
the verification and integration of all the design abstractions - in
A salutary reminder of the importance of this came today in
about its use of such tools from Synopsys
in its design process for controllers aimed at the
SD 3.0 and eMMC 4.4 industrial flash memory card controller is designed to
deliver the highest level of reliability and data retention when using
innovative sub-20nm MLC flash technologies" said Axel Mehnert, VP of
Marketing at Hyperstone. "Our mission is enabling future NAND flash and
advanced technologies to be fit for use, especially within industrial,
ruggedized applications. This requires the robust verification and analysis
provided to us uniquely by Synopsys' VCS functional verification solution. No
other technology had the capacity, performance, advanced verification features
and reliability to verify such complex designs."
comments:- in reality it's never as simple as - we used these tools -
turned the handles - and the design popped out. May work for simple devices like
CPUs or DRAM - but not for real complicated stuff like SSDs. Imagination, true
grit, magic spells and serendipity are essential elements in SSD alchemy too.
|LSI integrates "SSD
market on a chip"|
Editor:- November 18, 2013 - LSI today
its 3rd generation SandForce SSD controller family - the SF3700 which - based
around a single chip design - spans a wide spectrum of SSD market
applications (from consumer to enterprise) - includes native jumper-selectable
SATA or gen 2 PCIe interfaces - and incorporates adaptive R/W DSP ECC
Editor's comments:- The SF3700 (now sampling) is
the most ambitious design of a single chip
SSD controller in
Its 14 core design integrates many impressive design and
architectural features including:-
- the ability to efficiently configure as either
architecture or big architecture SSD controller.
design can be configured with as little as 3 flash chips in entry level
consumer SSDs - or as many as 129 chips when maximally configured in a 9 channel
enterprise design which can recover from the complete failure of a memory chip
as well as partial failures in other memory chips in the array.
recently spoke to Kent
Smith at LSI about this new product.
- dynamically adjusted power islands within the chip - enable a single
silicon design to support both the low requirements of deep sleep mode in SATA
notebooks as well as the performance requirements of entry level PCIe SSDs.
Our conversations about
SandForce SSD controllers go back more than 4 years - so we skipped a lot of
One of the first things I said to Kent - was - I've been
nagging you for years and asking - when are you going to do a native PCIe SSD
controller?- and for nearly 2 years it's been clear that another big hole in
LSI's SSD IP bag has been
- and now you've finally done both at the same time in a single product.
was also really impressed by the quality of LSI's
document on the LSI SandForce SF3700 (pdf) - which explains just about
everything you need to know. So I asked Kent - why does he need to waste time
talking to editor's like me? - why doesn't LSI just publish the document on the
web and let it speak for itself?
I said a lot of publications will
simply copy some of your pictures without attribution - and I think readers
would find it valuable seeing them too - but I think it would be fairer to the
work you've done if I could just make the whole document available - so there
was no doubt who had done the hard work of communicating what the design was all
He agreed to that - and you can click on the link above to see
the original info which I got from LSI.
Some other things I learned
from this conversations were:-
- The SF3700 is a completely new design. - It leverages all the flash
related design concepts related to endurance and array level fault management
which have been proven in earlier designs and extends them too.
example RAISE has been enhanced so that for high-end configurations it can
protect against a full memory chip failure as well as multiple block faults -
whereas entry level SSDs which need some RAID like features but can't afford an
extra memory chip can use fractional RAISE.
I think the SF3700 is a very ambitious and outstanding SSD controller design -
which will elevate LSI's reputation within the SSD industry.
- One of the reference designs which LSI offers for this controller is for an
M.2 form factor - which is goiing to be the game changing SSD for the
next year. The card design is the same whether the SSD is being used as a
SATA or PCIe SSD. A single jumper sets the configuration at assembly time.
LSI's 2.5" reference design will also make it easier for oems to
produce products for enterprise arrays in the
2.5" PCIe SSD market.
past year or so I had been wondering if the glory days of LSI's SSD controller
technology lay mostly in the past. But I can now understand why it took them
so long to integrate this new design - which is almost at the integration level
of "SSD market in a chip".
A design which integrates so many
architectural features which are optimized for so many markets wouldn't have
been feasible for a small SSD start up.
Below you can see one of the
many pictures I spoke about in LSI's paper. If you click on it you'll see the
|PS - I almost forgot to mention
one funny marketing thing I learned. |
Kent told me that they used to
call the SandForce products "SSD processors" but then found that
didn't show up too well in web searches - because people were looking for "SSD
controllers" instead. So LSI has changed its parlance and is now calling
them "SSD controllers" too.
As I said above - Kent draws
some great pictures which illustrate the functional blocks within SSDs.
He also writes a lot of SSD
blogs too. So I was relieved to hear that he gets paid on an SSD
marketer's pay grade rather than that of a writer. That means SSD editors
and bloggers don't need to worry that he'll be tempted to come and replace us.
Phison controller inside Chromebook
14, 2013 - Phison
that its PS3109
controller is being used in an SSD inside the
Chromebook launched recently by Acer.
Toshiba will design new SSDs using DensBits' flash controller IP
October 21, 2013 - DensBits
that it has licensed its advanced Memory Modem technology (a variety of
and DSP flash controller IP) to Toshiba for use in new
designs of SSDs.
MOSAID resumes the conversation about licensing HLNAND
September 23, 2013 - Growing market demands for capacity and performance in
the enterprise SSD market is highlighting the intrinsic weaknesses in standard
flash memory interfaces.
That's the theme of a recent blog -
HyperLink NAND technology and scalability by Peter Gillingham, VP
and CTO Conversant
(the new name for MOSAID Technologies) who writes - "In the
space, where PCIe is
often used to connect storage hardware, SSDs require as many as 25 to 50
channels to provide the throughput demanded by the system interface... but even
2nd generation flash interfaces such as ONFi and toggle mode are not up to the
Editor's comments:- MOSAID - which will legally
its name to Conversant in January 2014 - first started talking about its
HLNAND architecture in
May 2007. But the
company - which recently changed its name - has been licensing its patents in
fast memory systems design since
Among the many reasons - why the company says its
simplifies the design of ultra high bandwidth scalable SSDs (pdf) are the
low loading on each device which means that latency is not degraded to the
same extent by capacitive bus load as in traditional memory topologies.
Proton Digital launches new controller platform
August 12, 2013 - Proton
Digital Systems today
details of its new LDPC based FlashPro (a
controller ) platform
which will be demonstrated this week at the Flash Memory Summit.
says its error
recovery technology enables reliable deployment of next generation
1y-nm/1z-nm MLC, TLC and 3D Flash memory from all major NAND Flash
manufacturers. FlashPro also features a micro-programmable sequencer that
supports Toggle and ONFi interfaces and addresses all flash commands, including
FlashPro has upto 8 flash channels each
supporting 533MBps and up to 32 Chip Enables per channel. Each media manager can
support data transfer rates from 50MBps up to 4.27GBps and multiple
instantiations can be integrated to achieve the desired capacity and
Silicon Motion samples fast low power SATA 3 SSD controller
August 12, 2013 - Silicon
it has begun sampling a low power consumption, fast
regular RAM cache
SSD controller which supports MLC, TLC and SLC NAND flash from all the major
supports 4 channels of NAND flash devices with up to 8 CEs per channel and can
enable sequential reads upto 540MB/s and writes upto 410MB/s. Random IOPS
performance is upto 80,000 read IOPS and 75,000 write IOPS. Average power
consumption is 60mW. Security
features include AES 128/256, TCG and Opal full-drive encryption compliance.
comments:- in a paper this week at the
Flash Memory Summit -
Efficient LDPC DSP System for SSD (pdf) - Jeff Yang Principle
Engineer, Silicon Motion discussed how its LDPC adaptive DSP techniques which
supports variable parity lengths provides 3x better
than traditional BCH.
Seagate invests in eASIC
Editor:- August 5, 2013 -
it has got a strategic investment from Seagate.
eASIC has demonstrated innovative custom silicon technology with our... solid
state hybrid drives said Rocky Pimentel,
chief sales and marketing officer at Seagate. eASICs ability to quickly develop
custom solutions while meeting stringent cost, power and performance
requirements will enable us to rapidly improve our product position in both
SSD and SSHDs.
Overview of PCIe topologies for enterprise SSDs
July 17, 2013 - PLX
Technology recently published a white paper -
and PCI Express - which gives an overview of past, current and future PCIe
SSD connection topologies along with a list of detailed reference articles.
recent years we've seen the start of a growing
diversity in both
the type and functionality of
PCIe SSDs. PLX's new
article provides a good introduction to what can be done with PCIe in an SSD
context - and may make you rethink your ideas about the roles of this interface
Skyera increments SSD brainiacs headcount
May 14, 2013 - Skyera
today announced it's new chief architect is Andy Tomlin -
who was formerly VP of SSD Development at WD and before that
was VP of firmware and software at SandForce.
the challenges facing memory channel SSDs
2013 - StorageSearch.com
today published a new article -
Storage SSDs - will the new ultra low latency SSD concept fly? - should you
book a seat yet?
OCZ will exit SandForce driven consumer SSD market
April 17, 2013 - OCZ
it will move the majority of its consumer SSDs to its own Barefoot 3SSD
controller technology (Barefoot 3) in the next few quarters. Effectively
exiting the very competitive
controller driven consumer
SSD market should make it easier for OCZ to differentiate its products
and get better profit margins.
Intels oems LSI's RAID caching SSD technology
April 8, 2013 - Intel
- which already uses LSI's
SandForce controllers in some SSDs - will oem LSI's dual-core RAID-on-Chip
flash caching technology it was announced today.
LSI says their
caching technology can double the number of VDI sessions supported in the same
sever and flash environment.
Intels selection of
Nytro MegaRAID technology is another significant validation of our strategic
focus and investments in flash-based server acceleration technology, said
senior VP and GM, Accelerated Solutions, LSI.
SSD performance characteristics and limitations
March 15, 2013 - published today - the new home page blog on StorageSearch.com is -
a toolkit for
understanding flash SSD performance characteristics and limitations. It
brings together in one place many of the tools I use every day when thinking
about and assessing SSDs.
Violin migrates controller implementations to eASIC
February 27, 2013 - Violin
has selected ASICs from eASIC's
Nextreme-2T range to replace
high density FPGAs and implement fast flash controller functions more
its 6000 series SSD rackmounts it was
There is tremendous innovation going on in the enterprise
storage market and we are thrilled to be working with Violin, one of the fastest
growing leaders in this space, said Ronnie Vasishta,
President and CEO, eASIC. OEMs need to continuously innovate and quickly ramp to
volume production. We are starting to see a tipping point where FPGAs cannot be
used in mission critical, power sensitive, volume applications and the ASIC
alternatives do not meet the requirements. Traditional cell-based ASICs just
take too long to design and ASSPs have limited flexibility for the NAND FLASH
Silicon Motion's new mobile devices TLC SSD controller
February 21, 2013 - Silicon Motion
announced imminent sampling of a new
controller - for consumer handheld products.
The SM2703 is a
single-channel, SD 3.0 UHS-I (Ultra High Speed Phase I) card controller with
superior support for the vast majority of NAND flash, including 2y-nm, 1x-nm and
1y-nm TLC and MLC which delivers up to 95MB/s and enables full HD video
recording capability by digital cameras, smartphones and other mobile devices on
both Class 4 and Class 6 SD flash memory cards using cost-effective TLC NAND
"We've already had tremendous success in the UHS-I
market since we introduced our first UHS-I controller 2 years ago - which was
used by most of the world's leading flash card brands" said Wallace Kou,
President and CEO of Silicon Motion. "Our solution was widely adopted
because it was high performance, cost-effective, and supported the vast majority
of available NAND components. Our new 55nm based SM2703 controller is
firmware compatible and is a cost-effective, flexible quick way to market for
customers who want to use the latest MLC and TLC NAND flash."
Proton gets funds to rejuvenate prospects for flash
February 7, 2013 - Proton
Digital Systems today announced
the completion of its $2 million seed round to support continued development
and expansion of its LDPC-based flash read channel IP products that increase
and longevity of
Protons IP is currently licensed for enterprise and consumer applications and
has already been adopted by some of the worlds largest flash memory companies.
and DSP IP in SSDs, flash
SSD management care schemes
RunCore is 1st to announce BiTMICRO OnBoard
January 29, 2013 - today announced that
Talino controllers in its new
Kylin III MAX
family (fast PCIe SSDs).
Marvell aims at SSD on a chip market
January 2, 2013 - Marvell
it has made a strategic investment in Memoright.
part of the new collaborative agreements Memoright will write firmware
for Marvell's eMMC controllers - which will speed Marvell's entry into the
tiny SSD market for
use in smartphones and tablets.
Proton's 9x endurance, 2x speed enterprise flash IP now available
December 17, 2012 - Proton
Digital Systems today
the immediate availability of an
( Low Density Parity Check) NAND FLASH read channel for enterprise storage
applications compatible with implementation using
enables enterprise storage vendors to double the throughput performance at
approximately half the power that can be achieved using state-ofthe art FPGAs.
The Proton Digital Systems LDPC read channel enables enterprise
FLASH storage system companies to leverage low cost MLC flash devices and
increase its longevity
to 45,000 program/erase cycles, compared to only 5,000 program/erase cycles
We were keen to work with eASIC as we are
increasingly seeing eASIC devices being selected as platforms for enterprise
grade customized flash controllers, said Dr. Andrei Vityaev, CEO at
Proton Digital. In enterprise storage systems, production volumes are often not
high enough and the market changes are too dynamic to justify cell-based ASICs
but performance and low power requirements are beyond the capability of FPGAs.
This makes an eASIC
solution ideal for this space.
Editor's comments:- this
flash DSP technology enables oems to do the kind of things which
STEC already do in
SAS SSDs, and which
Skyera does in its
rackmounts. This type of technology will become essential for fast-enough SSD
makers to remain efficient
and competitive in the next few years. The only other game in town for
licensing something similar right now - is
experimental technique eliminates flash endurance limit
December 2, 2012 - An article in IEEE
Memory Survives 100 Million Cycles - summarizes a recent research paper by
which described an experimental technique to redesign flash cells to improve
technique - which StorageSearch.com does not think is feasible to scale for
commercially competitive memory densities - involves designing addressable
heaters in the memory array which can pulse upto 800 degrees C for a few
milliseconds. This thermal "refreshing cycle" anneals the chip
material and heals common wear-out defects while also enabling the cells to be
Afterward, we realized that there was no new physics
principle invented here, and we could have done this 10 years ago said
the project director at Macronix
sources power holdup technology for NVDIMMs
14, 2012 - Micron
has signed an
agreement with AgigA Tech to
collaborate to develop and offer nonvolatile DIMM (NVDIMM) products using
AgigA's PowerGEM (sudden power loss
controller and holdup modules).
Crocus will sample secure fast MRAM controllers in January
November 5, 2012 - Crocus
that in January 2013 it will sample 1.2MByte high speed SIMs and small secure
fast R/W speeds will enable optimized personalization and over-the-air updates
The CT32MLU product family breaks the barrier of traditional
non-volatile memory that
will provide smartcard makers with best-in-class secure element microcontrollers
with a 20 to 30% smaller footprint, said Alain Faburel,
VP security business unit at Crocus Technology.
the next big SSD idea?
Editor:- October 3, 2012 -
published a new blog
the advantages of
comparative differences in SSD design efficiency.
Intel paper - Data Integrity on 20nm flash SSDs
August 22, 2012 - "Avoid skepticism and seek understanding" - is one
of the calls to action in
paper - Data Integrity on 20nm SSDs (pdf) - presented today at the Flash Memory Summit
a bold move at the start, the author - Robert Frickey - brings to the
fore the subject of flaky
SSDs and firmware bugs and recalls - naming several SSD vendors in this
context - including Intel.
He says "Despite datasheet metrics,
it's not easy to predict behavior of SSDs in the field. Validation should be
considered as part of data integrity."
Even if you've already read
many other articles on SSD data integrity - this paper clearly communicates
some fundamentals about flash cells and the variety of different types of
disturb errors which makes it a useful educational document.
tone with what some other leading SSD companies are saying too - the author
urges you to "Understand your
usage model and
requirements. Innovate around application needs." ...read
the article (pdf)
IDT samples controllers for NVMe compatible 2.5" PCIe SSDs
August 21, 2012 - IDT
it's sampling single chip NVMe
compatible flash SSD
controllers for designers in the
PCIe SSD market.
models are available:- a 16-channel with PCIe x4 Gen 3 (89HF16P04AG3
for smaller footprints such as the
2.5" PCIe SSD
market - supports upto 2TB capacity) and 32-channel with PCIe x8 Gen 3 (89HF32P08AG3
for the conventional size cards upto 4TB capacity) - in 27 x 27 mm and 40 x 40
mm FCBGA packages respectively.
Both products support connection to 2
hosts and failover for
comments:- for those of you who like videos - I suggest you see
video which starts with an introduction to acceleration SSDs, explains the
advantages of having a standard such as NVMe - which means that oems can have a
single common set of drivers which work with SSDs from multiple vendors and
describes more features of the products - including hot pluggability.
DensBits acclaimed with "most innovative flash memory
Editor:- August 27, 2012 - at the recent
Flash Memory Summit
last week DensBits
acclaimed Best of Show award winner in the category of most innovative flash
memory technology for its 3 bits/cell
IP controller technology (which the company brands as its
comments:- as I said here in
April when the
company exited stealth mode - it was clear that this was a company which would
make waves in the SSD market. It shot straight into the
top 20 SSD companies
list in the same quarter. The recent award from Flash Memory Summit -
which is based on a panel of industry experts - is well deserved.
LSI ships 1 million SandForce controllers / month
July 31, 2012 - LSI
has announced enhanced support for the
market in its SandForce
SF-2200/2100 controllers:- enabling lower SSD power consumption, faster
boot and support for "virtually all MLC flash product families".
has shipped well over 10 million
and we anticipate our shipment volumes will continue to increase, driven by the
exploding demand and lowering price points for NAND flash technology, said
VP of marketing, Flash Components Division, LSI.
comments:- last week I asked LSI if the power saving feature was related in
any way to adaptive
DSP care. I haven't got an answer yet - so it may be the answer is No.
On the other hand maybe they're waiting for the
Flash Memory Summit (in 3 weeks
time) before they say more about their adaptive write DSP IP roadmap.
have shipped over 10 million SSD controllers - since
2010 - and
they're currently shipping over 1 million per month.
Seagate chooses DensBits for TLC and 1Xnm
June 25, 2012 - Seagate
announced today it will use DensBits's flash care
technology in the design of forthcoming consumer and enterprise SSDs.
has also made an equity investment in DensBits.
comments:- I've already written more than enough about about this technology
trend recently on the home page.
Hynix acquires DSP SSD IP company LAMD
20, 2012 -SK Hynix
it has entered into an agreement to acquire California-based storage solution
The reason for the acquisition should be clear if you
read the article on my home page yesterday about the new generations of
adaptive SSD controllers. The
roadmap for flash memory
is dependent on these technologies to enable workable SSDs.
new article - adaptive flash care IP (including DSP)
Editor:- June 19,
2012 - A few months ago I promised readers that I would publish a tentative list
of SSD companies who use what I loosely called "adaptive DSP technologies
in SSD IP" in their new designs. Here
does ReRAM have role in hybrid enterprise SSDs?
June 15, 2012 - A research group led by Professor Ken Takeuchi
at Chuo University in Japan has published results of using
ReRAM in a
with flash which can reduce power consumption by an order of magnitude and
increase the operating life by 7x according to -an article
in Nikkeibp.co.jp. The research is looking at implications for enterprise
LAMD launches 90K IOPS SATA SSD controller
June 11, 2012 -Link_A_Media
a fast new
SSD controller aimed
at the SATA SSD market.
LM87800 can deliver 90K sustained random
R/W IOPS and
550 MB/s sustained sequential throughput using a 6Gb/s
SATA host interface.
The company says its eBoost SSD technology uses proprietary adaptive
DSP techniques coupled with powerful on-the-fly error correction technology.
With 8 NAND channels supporting the high-speed ONFi 2.3 and Toggle 1
flash interfaces, the LM87800 can access up to 1TB of commodity NAND flash while
also cost-effectively supporting lower capacities.
Buffalo puts MRAM into SSD cache
Editor:- May 21,
2012 - Buffalo
Technology is using a
nvm approach in a new
design of SSD - according to a report in Tom's
Hardware - which says the company will use
in its cache.
Editor's comments:- this was anticipated in my
2008 article - the Flash
SSD Performance Roadmap.
RAM cache flash
ratio in SSDs varies from close to zero (skinny) upto
RAM makes it easier for designers to meet
which are desireable in some applications - but it also creates additional
cost and complexity in the
loss management subsystem.
RAMlike NVMs such as MRAM aren't a
golden bullet either - but by compressing the time window required to maintain
holdup for critical save operations from milli-seconds to microsends (and
cleaning up the state on the next restart) such chips can enable a smaller
footprint than other approaches.
At the other end of the spectrum -
designers of skinny cache controller architecture can achieve the same
in-system apps results with virtually no RAM. So - as usual in SSDs - you will
see a diversity of
approaches in competing SSDs. They aren't all going down the same path -
even if the destination looks the same.
DensBits samples new TLC flash controller
April 30, 2012 - DensBits
today released a new SSD controller - the
which supports the latest 2Xnm and 1Xnm TLC (3 bits/cell ) MLC flash with an
figure of more than 10K P/E cycles and R/W performance of up to 95MB/s / 65MB/s
and 4,000 / 1,100 R/W
for sequential and random operations, respectively.
Modem technology (adaptive DSP in SSD IP) which enables a native TLC
solution with more than double the endurance of 2 bits/cell (MLC), and near-MLC
Editor's comments:- It's easy to miss the
significance of new SSD products and technologies. And you might think from
looking at the text and numbers above - this is a consumer style
SSD controller - and
it's not for me.
But I think DensBits may become one of the
top 20 SSD companies
real soon - unless it gets acquired before that happens. Its flash technology
has very high roadmap
symmetry and the potential to impact competitiveness in the consumer,
embedded and fast-enough enterprise SSD markets with a splash that's as big as
when it emerged on the scene 3 years ago. You can read more in
Who's who in SSD? -
SandForce driven SSDs get 5x SMARTer
26, 2012 - I recently learned that SMART has figured
out a way to get 5x more endurance from consumer flash when using
unmodified industry standard controllers from LSI/SandForce. This
is discussed in more detail in
archived SSD news.
how fast can your SSD run backwards?
20, 2012 - StorageSearch.com
today published a new article which looks at the
11 key symmetries in
Whether you're a
investor in SSDs -
this new conceptual framework will help you to comparatively evaluate any SSD
compared to competitive offerings. It's helpful whether you're looking at raw
SSD IP and controller chips right up to the most complex
SSDs are complex devices and there's a lot of mysterious
behavior which isn't fully revealed by
vendor's product datasheets and whitepapers. Underlying all the important
aspects of SSD behavior are asymmetries which arise from the intrinsic
technologies and architecture inside the SSD.
Which symmetries are
most important in an SSD? - That depends on your application. But knowing
that these symmetries exist, what they are, and judging how your selected SSD
compares will give you new insights into SSD
no such thing as a perfect SSD in the market today - but the SSD
symmetry list helps you to understand where any SSD in any memory technology
stands relative to the ideal. And it explains why deviations from the ideal can
The new article unifies all SSD architectures and
technologies in a simple to understand way. Now that I've spent
20 years thinking about
it - it all seems really obvious now. This is the most important article
about SSDs that I've written in the past few years. But I couldn't have written
it before. I hope you like it.
...click to read
Dataram monetizes hybrid caching SSD ASAP IP
April 4, 2012 - Dataram
it has sold its patents portfolio related to solid state storage and
SSD ASAPs for
$5 million to Phan Tia Group.
Dataram retains a license to
continue to use the patents in current and future Dataram products including
XcelaSAN with limited
rights to transfer its license. ipCapital Group
assisted in patent valuation, and supported Dataram on the negotiation and
successful close of this transaction.
Editor's comments:- this
is a good deal for Dataram. This way they retain their stake in the
RAM end of the
SSD ASAP market -
and get some cash to pursue growth ideas. The XcelaSAN has been aimed at
niche segments in the enterprise
SSD market - but could take off in new directions with the appropriate
new Marvell SSD controllers will accelerate Ultrabook masses
March 14, 2012 - Marvell
mass design wins for its new high speed 6Gbps SATA
SSD controller - the
88SS9187 which supports
regular RAM cache
(upto 1GB) and upto 500MB/s R/W even at dirty drive conditions.
supports on-chip RAID
technology for the NAND device with flexible customer firmware based algorithms
to optimize retiring
of defective NAND block,
die or device and has the
power consumption of any controller in this performance class.
NeoMagic demos FPGA simulation of USB MagicVault controller
February 27, 2012 - NeoMagic
that the company is ready to demonstrate MagicVault, its USB 3.0 based UFD USB
Flash Drive Controller solution on an FPGA platform.
SMART-inside SAS SSDs - offer credible competitive alternative
Editor:- February 22, 2012 - SMART Storage Systems
Ultra (a 1.2TB 2.5" 100K/60K IOPS, 500MB/s R/W
SAS SSD) which uses
the company's new, in-house developed, high reliability enterprise SSD
controller IP - which includes DSP and adaptive programming techniques to
deliver industry leading SSD data integrity and upto 25x / day full disk
writes for 5 years endurance - while using low cost consumer grade MLC.
- "The new controller learns from each chip the best way to handle it
- and can even use different parameters in different parts of the chip and at
different points in time too." - from
Who's who in SSD - talking to SMART's
President - John Scaramuzzo (Feb 28, 2012)
VIA chooses Tensilica core for new SSD controller
February 15, 2012 - Tensilica
that VIA has
selected Tensilica's Xtensa dataplane processors (DPUs) for a new design of SSD
After conducting a technical evaluation, VIA determined
that Tensilica's DPUs provide over 4x the performance of competing processors on
key algorithms used to benchmark competitive alternatives.
With conventional processors, increasing the clock speed is the
common way to increase SSD IOPS. However this increases energy consumption
and die size, especially as speeds increase so much that designers are forced to
move to more complex multi-core solutions.
Tensilica says its DPUs
allow designers to customize the IP core, mix both control and signal
processing, and add high-bandwidth connectivity to increase performance without
increasing the clock speed.
For example, designers can use
single-cycle bit field manipulation and arithmetic instructions along with
multiple simultaneous single-cycle table lookups to achieve over 10x the
efficiency of other processors. This not only increases IOPS, but also
significantly reduces the energy consumed and the complexity of the SOC design
Editor's comments:- There's a good precedent for
this. When SandForce
came to market in April
2009 - their CEO (at that time) Alex Naqvi
told me their controller
used the dataplane processors from Tensilica.
Rambus gets into the nv memory IP market
February 6, 2012 -Rambus
it has acquired Unity
Semiconductor for an aggregate of $35 million in cash.
part of this acquisition, the Unity team members have joined Rambus to continue
developing innovations and solutions for next-generation
"At Rambus, we are creating disruptive technologies
to enable future electronic products," said Sharon Holt,
senior VP and GMof the Semiconductor Business Group at Rambus. "With the
addition of Unity, we can develop non-volatile memory solutions that will
advance semiconductor scaling beyond the limits of today's NAND technology. This
will enable new memory architectures that help meet ever-increasing consumer
Intel's fastest SSD uses SandForce inside
February 6, 2012 - Intel
it has used SandForce
controllers for the first time in its new (and fastest) SATA 3 2.5"
SSD - the
SSD 520 - which (with upto 80K R/W IOPS peak - 4KB) is aimed at gaming, CAD
and graphics content creation markets.
"We worked closely with
Intel to leverage their deep understanding of the NAND flash, ultimately
providing a unique and optimized solution for client computing applications with
the LSI SandForce Flash Storage Processor," said Michael Raam, VP
and GM of LSI's Flash Components Division.
Violin video re visibility advantages of home grown controllers
January 23, 2012 - I commented recently that the
top 10 SSD companies in
Q4 2011 all had one thing in common (apart from the fact they make SSDs) -
they all had their own proprietary
architecture which they could use to optimize products for some application
markets (even if some of them also used other controllers too).
video - Violin's,
CTO Software Jonathan Goldick
talks about the benefits they get from having their own controller.
like it because it also echoes themes I discussed last year in my
big versus small
SSD architecture article - and also because it's short - less than 250
Violin's SSD video
BiTMICRO's new SSD controller nearly ready
January 17, 2012 - BiTMICRO
has named its new SSD
controller - which has just gone through
It's called TALINO-DE
- Translation and Linking of I/O Nodes -Device Edition. - Not very catchy - but
all the best SSD
names have gone.
The multi-core TALINO-DE is
architecture (manages hundreds of flash chips) and includes full data path
embedded AES engines for data
security, embedded XOR engines for delivering faster transaction processing
in RAID configurations,
management, and other resource optimization.
comments:- the new controller appears to be in a similar conceptual class
to those which have been shipping in some
PCIe SSDs from
example - although these in turn are very different - starting at the
basics (TMS designs range from regular to fat, whereas Virident is skinny.)
the new BiTMICRO controller lives up to its promise - and if it's marketed as a
merchant chip set - it could lead to a commoditization of PCIe and rackmount
SSDs similar to the effect
SandForce had on the
enterprise 2.5" SSD
NVMe compliant IP core aims at PCIe SSD designers
January 6, 2012 - IP-Maker
transfer manager core - for use in
PCIe SSD designs
fitting between the media and the
flash controller. The
design is compliant with the NVM
PCIe SSD manufacturers will benefit from a
performance increase thanks to the IP-Maker NVMe IP core says Mickaël Guyard, Product
Marketing Director at IP-Maker. This efficient DMA manager ensures the data flow
up to the NandFlash, therefore off-loading the motherboard CPU.
Viking ships nv 8GB DDR3 DIMM
Editor:- October 18,
Viking said it
extension of their nv module range.
ArxCis-NV plugs into standard
RAM sockets and provides
2GB to 8GB RAM which is backed up to SLC flash in the
event of a
power failure - while the memory power is held up by an optional external
25F supercap pack. Viking says these new memory modules can eliminate the need
for battery backup units in servers and the maintenance logistics associated
with maintaining them. They are specified as being maintenance free for "5
years @ 60C".
Editor's comments:- will these new modules
replace batteries in
RAM SSDs? - I doubt it
- because of scalability issues - like managing a spiderweb of 100+ dangly
bits of wire when you have a terabyte of RAM. Having said that - there are many
applications which only use a small number of memory chips which could benefit
from such a product.
Hybrid Memory Cube will enable Petabyte SSDs
October 7, 2011 - Samsung
and Micron this
week launched an new industry initiative - the Hybrid Memory Cube Consortium
- which will standardize a new module architecture for memory chips -
enabling greater density, faster bandwidth and lower power.
is unlike anything currently on the radar," said Robert Feurle,
Micron's VP for DRAM Marketing. "HMC brings a new level of capability to
memory that provides exponential performance and efficiency gains that will
redefine the future of memory."
Editor's comments:- HMC
may enable SSD designers to pack 10x more
RAM capacity into the same
space with upto 15x the bandwidth, while using 1/3 the power due
to its integrated power management plane.
The same technology will
enable denser flash SSDs too - if flash is still around in 3 years' time and
hasn't been sucked into the obsolete market slime pit by the
lurking nv demons
which have been shadowing flash for the past 10 years and been waiting for each
"next generation" to stumble and be the last.
management architecture integrated in HMC and the density scaling it allows
for packing memory chips (without heat build-up) are key technology enablers
which were listed as some of the problems the SSD industry needed to solve
in my 2010 article -
this way to the
How big was the thinking in the SSD design?
July 5, 2011 -
Why size really
does matter in SSD design architecture is a new article recently
published on StorageSearch.com
designers, integrators, end users and investors - understanding what follows
from simple Big versus Small architectural choices predicts a lot of
important consequences. ...read the article
flash SSD capacity - the iceberg syndrome
June 22, 2011 - have you ever wondered how the amount of flash inside a
flash SSD compares to the capacity shown on the invoice?
published a new article -
capacity - the iceberg syndrome .
What you see isn't always what
you get. There can be huge variations in different designs as vendors leverage
capacity to tweak key
parameters. ...read the
what happens in SSDs when power goes down? - and why you should
Editor:- February 24, 2011 - StorageSearch.com today published
a new article -
SSD power is
going down! - which surveys power down management design factors in
Why should you care what happens in an SSD when the power goes
This important design feature - which barely rates a mention in
most SSD datasheets and press releases - is really important in determining SSD
data integrity and operational reliability.
This article will help
you understand why some SSDs which work perfectly well in one type of
application might fail in others... even when the changes in the operational
environment appear to be negligible. If you thought
was the end of the SSD
reliability story - think again. ...read the
new book - Inside NAND Flash
Editor:- November 17,
2010 - Forward
Insights (an SSD
analyst company) is one of the contributers to a new book called -
NAND Flash Memories.
The publishers say that
SSD designers must
understand flash technology in order to exploit its benefits and countermeasure
its weaknesses. The new book is a comprehensive guide to the NAND world -
from circuits design (analog and digital) to
pushing the SSD testing rock farther up the hill
August 25, 2010 - I'm mostly resistant to the idea of rehashing recent news
stories - but yesterday while talking about new SSD technologies a reader
asked me to take another look at
performance testing guidelines - which I reported on
a month ago.
said I had been surprised it took
SNIA so long to look at
these issues - because I had been aware of "Halo effects" in
flash SSD benchymarks for years - and commented - "But I guess member
led ORGs have a built in lag factor and only move at the speed of the
slowest exec members."
The reader - Neal Ekker -
whom I knew from his time at
Texas Memory Systems -
put up a spirited defense for this particular ORG opus and said...
all known about the fishy-ness of SSD performance claims for years. But I'd like
to draw attention to what an impressive accomplishment the SNIA SSS PTS
represents, no matter its technical merits or ramifications. I watched it
happen, and I can tell you it was an amazing POLITICAL achievement. And
I don't mean that in a negative way. Any time there's more than one person in a
room, there's politics. For a collection of engineers representing both their
own egos and the interests of their employers to finally agree on even this
rather bare-bones beginning standard was just remarkable to observe. I can't
begin to give enough credit to some of the chief movers and shakers.
Neal Ekker added - "This is why I want more attention focused on
the SSS PTS right now, so we don't lose momentum entirely. There's still plenty
of work to be done. We need additional companies and fresh faces and energies to
step up and push this rock a little farther up the hill."
Editor's comments:- During the majority of the SSS PTS development Neal
Ekker served as the SNIA SSSI Education Committee Chair. He's now a for-hire
independent SSD marketing consultant. ...Neal's bio,
PTS (pdf), Storage
|reset the reference SSD design
creep in controller traffic
management and other reasons
to fade out
server DRAM DIMMs
in the virtual memory slider mix
sudden power loss|
|Why should you care
what happens in an SSD when the power goes down? |
This important design
feature - which barely rates a mention in most SSD datasheets and press releases
- has a strong impact on
SSD data integrity
This article will help you understand why some
SSDs which (work perfectly well in one type of application) might fail in
others... even when the changes in the operational environment appear to be