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Spin Transfer Technologies, Inc. was established by Allied
Minds and New York University to develop and commercialize its orthogonal spin
transfer magnetoresistive random access memory technology, OST-MRAM. The
technology, discovered by
Professor Andrew Kent, has enormous implications for the development of spin
transfer MRAM devices, including faster switching times, lower power operation
and scalability to smaller dimensions. www.spintransfer.com
see also:-
NVM
- mentions on StorageSearch.com,
STT's technology page |
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| Editor's comments:- Spin Transfer Technologies
operates in the nvm market
- particularly in that aspect of the market in which magnetic semiconductor
memories are being used instead of flash. The company's Precessional Spin
Current (PSC) structure - which is compatible with most MRAM processes and
tools and was announced in 2018 - transforms the data integrity and retention of
MRAM to make its use in datacenter ASICs more feasible. |
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In February 2012 -
Spin Transfer Technologies
announced
it has secured $36 million in Series A funding led by its parent company,
Allied Minds and
Invesco Asset Management.
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| Spin Transfer Technologies
says its breakthrough tweak to MRAM structure will enable new uses in datacenter
ASICs |
Editor:- April 30, 2018 -
Although it can be an enigmatic challenge figuring out what the market
positioning and application roles of some alternative nvms really is - Spin Transfer Technologies
left no room for doubt in press releases today about recent enhancements in
their (ASIC compatible) MRAM technology.
Re
applications
SRAM is one of the target markets. STT says its improved MRAM - with
Precessional
Spin Current (PSC) structure - lengthens retention time by a factor of over
10,000 (1 hour retention becomes more than 1 year retention) while
reducing write current.
STT says the new PSC structure is compatible
with most MRAM processes, materials and tool sets and adds only about 4nm to
the height of the pMTJ deposition stack. PSC decouples the static energy
barrier that determines retention from the dynamic switching processes that
govern the switching current. Among the improvements:- PSC reduces read
disturb error rate up to 5 orders of magnitude. | | |
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| After 14 years of trailing
nand flash and not being competitive enough to exit labware - alt nvms got
the benefits of time travel - when the memory shortages of 2017 more than
doubled the expected price of flash and crashed the roadmap. |
| miscellaneous
consequences of the 2017 memory shortages | | | |
