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| leading the way to the new
storage frontier | |
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by Zsolt Kerekes,
editor - StorageSearch.com |
Little words can have with big meanings
in the
world of SSDs. They
affect price,
performance,
reliability and
user happiness.
This article collects together short descriptions of
many commonly used SSD terms (but not all). You may also find it useful to put
the words you're having trouble with into the site search box below - to get an
idea of the context. |
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SSD Endurance - Is a
term used in the context of
flash memory or
flash SSDs and is
more verbosely called "Write Endurance."
Simple
explanation... The number of write cycles which can be performed by any block
of flash is limited due to physics and technology imperfections which
eventually make the data storage process unreliable.
That number
varies according to the type of flash (MLC is usually 10x worse than SLC) and
according to the memory generation and also whether it has been designed (or
selected) for high endurance.
Typical quoted values in the market today
(2009) range from as low as 100,000 to over 2 million cycles.
Wear
leveling and write attenuation are architectural techniques which can be
used in SSD controllers
to mitigate the effects of endurance - and extend usable life of a memory array
by many orders of magnitude compared to the intrinsic life of a dumb flash array
without such a controller.
see also:-
SSD Myths and
Legends - "write endurance"
flash wars in the
enterprise SSD market- which so called "enterprise MLC" tastes
the sweetest? How come there are so many different and contradictory
reliability claims? |
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SSD Garbage Collection
is an important background process in
flash SSD controllers.
Some editors and software vendors (who don't understand flash
technology) mistakenly attribute a long term slow down in some SSDs to fragmentation
- when really the issue is the ratio of resources allocated to Garbage
Collection.
In well designed products which have reserved enough CPU
power, internal R/W bandwidth and over-provisioning this "performance
degradation" does not occur - or is minimal. For example systems from
Violin Memory.
The
term Garbage Collection was 1st used in 2002 - in an article we published
about flash SSD
reliability. Here's the definition below from that article.
The "Garbage
Collection Process" eliminates the need to perform erasure of the whole
block prior to every write. The "Garbage Collection process"
accumulates data marked for erase as "Garbage" and perform whole block
erase as space reclamation in order to reuse the block. |
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MLC (Multi Level Cell)
is a term used in the context of
flash memory and
flash SSDs to
describe how the storage charge in a single floating gate transistor cell is
interpreted by the logic system.
In traditional digital systems, the
change in state (of a voltage, current or charge) is interpreted as being either
1 of 2 distinct levels - "0" or "1" - which is where we
get the term binary logic from. Such flash cells are called SLC
(Single Level Cell).
In an MLC memory chip the stored charge is
interpreted as a range of values (0 to 3), (0 to 7) etc - which depends on
the ability of the discrimator circuits surrounding the memory array to
reliably tell the difference between levels.
The logical memory
capacity of a such a cell is 2 bits, or 3 bits etc - where the bits are binary.
Discriminating multiple levels is difficult to achieve technically -
because it involves an analog to digital conversion process - and due to
manufacturing tolerances the same charge may not represent the identical value
in another part of the chip.
There are also various factors which make
the process unrepeatable - by dumping charge into the cell when adjacent parts
of the chip are being written to, by leakage from the cell into the substrate
over time, and by damage in the transistor material due to successive writes
(endurance).
MLC designers overcome these problems (which become
harder in each shrink generation) by wrapping blocks of memory in protective
error correction and
detection codes.
Because the charge in an MLC cell is interpreted
as 2x, 4x etc more data than in the same geometry level SLC chip - MLC is much
more sensitive to age and wear-out factors than SLC. That's why oems typically
quote an endurance figure which is 10x lower.
Why go to all this
trouble? - MLC memory provides capacity which is 2x, 4x etc lower cost than
SLC. That competitive advantage is a compelling argument in many applications.
Throughput
is similar for SLC and MLC SSDs. Although the extra R/W complexity in MLC is
intrinsically slower than SLC - the data nibble going in or out of the cell is
worth more informational bits than in SLC - which compensates.
Another
refinement of MLC is x3 aka TLC (triple level cell) nand flash - which offers 8
distinct states in a single cell - equivalent to 3 binary bits of storage.
see
also:-
MLC
- editor mentions,
Are MLC SSDs Ever
Safe in Enterprise Apps? |
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"Silent Errors"
- is a term used to describe uncorrected data errors in a flash SSD which arise
from an incompletely understood, inappropriate or poorly designed data
integrity architecture.
Many new products are vulnerable to these
errors. For more details see the article:-
Data Integrity
Challenges in flash SSD Design |
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SSD Over-Provisioning
is a technique used in the design of some flash SSDs. By providing extra memory
capacity (which the user can't access) the SSD controller can more easily create
pre-erased blocks - ready to be used in the virtual pool.
2 beneficial
effects of Over-Provisioning are:-
- faster overall write IOPS, and
The latter case - is because another use of the extra capacity is to replace
bad memory
blocks - which occur at both ends of the bathtub curve.
There are
wide variations in the percentage of flash over provisioning in different SSD
designs. This is discussed in more detail in the article -
flash SSD
capacity - the iceberg syndrome. |
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SSD Wear Leveling is a
technique used inside flash SSDs to prolong the life of a flash memory array.
Countering the phenomenom called endurance - Wear Leveling processes
in the SSD controller keep track of how many erase cycles have been performed on
each flash block - and dynamically remap logical to physical blocks using
algorithms which spread out the wear over the whole population in the array.
Working hand in hand with over-provisioning - bad cells (which wear-out earlier
than the median life) can be replaced - considerable extending SSD life.
There
are 3 levels of wear leveling used in the best server grade SSDs - static,
dynamic and active.
Rugged & Reliable Data
Storage: Solid-State Flash Disks overview
Increasing Flash Solid
State Disk Reliability
SSD Myths and
Legends - "write endurance"
is eMLC the true
successor to SLC in enterprise flash SSD? |
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SSD Write Amplification
- is a term popularized by
SiliconSystems
in various flash SSD related articles and press releases.
Gary Drossel, a VP
at SiliconSystems defines it as follows. "Write Amplification - is a
measure of the efficiency of the SSD controller. Write amplification defines the
number of writes the controller makes to the NAND for every write from the host
system. Long, continuous writes map over this mismatch, but most embedded/
enterprise applications do not
stream data. Instead, they transfer data in a series of shorter, more random
transactions."
It's the difference in ratio between the number of
theoretical writes you think that your application does to a
flash SSD -
compared to what actually happens - due to OS or other software - which is often
outside your control. Write Amplification can be a serious problem - because it
can invalidate calculations related to
endurance.
SiliconSystems says - the best thing to do is measure it - rather than estimate
it. Their SSDs can be used as tools to do this - because they perform real-time
internal logs of write cycles. |
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SSD Write Attenuation -
is a term coined by the editor of STORAGEsearch.com.
It is the
opposite effect of Write Amplification - and reduces the amount of writes done
to the SSD compared to what you expect. This kind of out-of-sequence
recognition, and reordering of packets before writes usually requires a non
volatile RAM or similar memory inside the SSD controller.
Beneficial
side effects of Write Attenuation are:-
- lower wear-out of the flash SSD, and
- (often) faster random IOPS - because the nv cache doesn't have to be
flushed out as inefficiently - as in the case of unprotected RAM caches.
see
also:- Z's Laws -
Predicting Future Flash SSD Performance |
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Skinny, Regular and Fat
flash SSDs
These are new terms (July 2009) proposed in an article
called - RAM
Architectures in flash SSDs to describe RAM/flash ratios in flash SSDs. |
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ASAPs (Auto-tuning SSD
Accelerated Pools of storage )
This is a new term (November 2009)
coined by StorageSearch.com to
describe a product category which includes products like the following:-
Although
aimed at different markets, and having different interfaces, what they all have
in common is their ability to self-tune.
In effect - "ASAPs
eliminate waits for
the SSD Hot-Shot / Hot-Spot Engineer ..." |
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| 11 key symmetries in
SSD design - defines 11 new SSD jargon terms and provides a unified
overview of SSD architecture. |
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Legacy SSD and New
Dynasty SSD - are ways of classifying enterprise acceleration SSDs by the
architecture of the storage environment they were designed to go into.
This
nomenclature - was introduced in in September 2010 in this article -
A new way of looking
at the Enterprise SSD market. |
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