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Latency? - the devil is in the
detail.
"latency"
- mentions on the mouse site | |
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controllernomics - joins
the memory latency to do list
As predicted 8 years ago - the
widespread adoption of SSDs signed the death warrant for hardware
RAID controllers.
Sleight
of hand tricks which seemed impressive enough to make hard drive arrays (RAID) seem fast in the
1980s - when viewed in slow motion from an impatient SSD perspective - were
just too inelegant and painfully slow to be of much use in true
new dynasty
SSD designs.
The confidence of "SSDs everywhere"
means that the data processing market is marching swiftly on - without much
pause for reflection - towards memory centric technologies. And many old
ideas which seemed to make sense in 1990s architecture are failing new tests
of questioning sanity.
For example - is
DRAM the fastest main
memory?
No
- not when the capacity needed doesn't fit into a small enough space.
When
the first "flash as RAM" solutions appeared in
PCIe SSDs - in 2010 -
their scope of interest was software compatibility. Now we have them emerging
as DIMMS in the memory channel.
This is a context where software
compatibility and memory latency aren't the only concerns. It's
understanding the interference effects of all those other pesky controllers in
the memory space.
That was one of the interesting things which emerged
in a recent conversation I had with Diablo Technologies
about their Memory1.
See also:-
how significant
is Diablo's Memory1 for the enterprise data ecosystem? (August 13, 2015) | |
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Your old style "AFA
storage" is simply one of several software selectable emulation options
in a future memory system - just as hard drives and RAID were in the years
before the modern era of SSDs. |
After AFAs? -
what's next | | |
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"We are at a junction
point where we have to evolve the architecture of the last 20-30 years. We can't
design for a workload so huge and diverse. It's not clear what part of it runs
on any one machine. How do you know what to optimize? Past benchmarks are
completely irrelevant." |
Kushagra
Vaid, Distinguished Engineer, Azure Infrastructure - quoted in a blog
by Rambus -
Designing
new memory tiers for the data center (February 21, 2017) | | |
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Memory1 beats DRAM in big
data multi box analytics |
Editor:- February 7, 2017 - The tangible
benefits of using flash as RAM in the DIMM form factor are illustrated in a
new benchmark
Apache
Spark Graph Performance with Memory1 (pdf) - published today by Inspur Systems (the largest server
manufacturer in China) in collaboration with Diablo Technologies.
The memory intensive tests were run on the same cluster of five
servers (Inspur NF5180M4, two Intel Xeon CPU E5-2683 v3 processors, 28 cores
each, 256GB DRAM, 1TB NVME drive).
The servers were first configured
to use only the installed DRAM to process multiple datasets. Next, the cluster
was set up to run the tests on the same datasets with 2TB of Memory1 per server.
The k-core algorithm (which is typically used to analyze large
amounts of data to detect cross-connectivity patterns and relationships) was
run in an Apache Spark environment to analyze three graph datasets of
varying sizes upto a 516GB set of 300 million vertices with 30 billion edges.
Completion
times for the smallest sets were comparable. However, the medium-sized sets
using Memory1 completed twice as fast as the traditional DRAM configuration (156
minutes versus 306 minutes). On the large sets, the Memory1 servers completed
the job in 290 minutes, while the DRAM servers were unable to complete due to
lack of memory space.
Editor's comments:- As has been noted in
previously published research by others - being able to have more RAM emulation
flash memory in a single server box can (in big data computing) give similar
or better results than implementing the server set with more processors and more
DRAM in more boxes.
This is due to the traffic controller and fabric
latencies between server boxes which can negate most of the intrinsic
benefits of the faster raw memory chips - if they are physically located in
another box.
The key takeaway message from this benchmark is that a
single Memory1 enhanced server can perform the same workload as 2 to 3 non
NVDIMM enhanced servers when the size of the working data set is the
limiting factor.
More useful however (as you will always find an
ideal benchmark which is a good fit to the hardware) is that the Memory1 system
places lower (3x lower) caching demands on the next level up in the
storage system (in this case the attached NVMe SSDs). This provides a higher
headroom of scalability before the SSDs themselves become the next critical
bottleneck.
In their
datasheet
about Memory1 enhanced servers Inspur give another example of the advantages of
this approach - quoting a 3 to 1 reduction in server footprint and faster
job completion for a 500GB SORT.
the road to DIMM
wars are
you ready to rethink RAM? DRAM's
indeterminate latencies | | |
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It's by no means inevitable
that the biggest memory companies will also go on to become the biggest SSD
companies. That's like expecting Exxon to be the biggest car maker. |
boom bust
cycles in memory markets | | |
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Many of the important and
sometimes mysterious behavioral aspects of SSDs which predetermine their
application limitations and usable market roles can only be understood when you
look at how well the designer has dealt with managing the symmetries and
asymmetries which are implicit in the underlying technologies which are
contained within the SSD. |
how fast can your SSD
run backwards? | | |
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I'm just saying (as I have
been saying since 2003 in my article on SSD-CPU equivalence) why I think the TAM
for server based SSDs is a percentage of the server market - and almost entirely
decoupled from the cost of storage capacity on the SAN. |
meet Ken and the
enterprise SSD software event horizon | | |
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With hundreds of patents
already pending in this topic there's a high probability that the SSD vendor
won't give you the details. It's enough to get the general idea.
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Adaptive flash
R/W and DSP ECC IP in SSDs | | |
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If you spend a lot of your
time analyzing the performance characteristics and limitations of flash SSDs -
this article will help you to easily predict the characteristics of any new SSDs
you encounter - by leveraging the knowledge you already have. |
flash SSD performance
characteristics and limitations | | |
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This is something which
I forgot to ask Diablo in February 2017.
Do you have a supported RAM
Disk emulation for Memory1?
And - if so - how do the benchmark numbers look? (compared to a
similar quantity of flash - or maybe even the same physical devices) when they
are configured as native flash SSDs? |
a stupid question
about RAMdisk emulation in flash DIMMs | | |
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The memory chip count
ceiling around which the SSD controller IP is optimized - predetermines the
efficiency of achieving system-wide goals like cost, performance and
reliability. |
size matters in
SSD controller architecture | | |