| leading the way to the
new storage frontier||...|
|the SSD heresies
trust SSD market data?
sudden power loss
40 years of thinking
about nvm endurance
the latencies behind flash caching |
|Editor:- July 24, 2018 - A recent article -
of Application Data Caching : From RAM to SSD - on
Netflix Technology blog -
discusses their experience of using SSDs instead of pure RAM for caching data
(which in their case is mostly streaming videos). |
This trend of
flash replacing RAM in enterprise caches was a hot topic with my readers
in 2007 when
flash SSDs were approaching the tipping point of replacing
we know - flash won.
PCIe SSD market and
demands for server based flash caching were the key enablers in that victory
and for the formation of an independent
SSD software market.
Notable ISV pioneers in the flash caching applications arena were
IO Turbine - both
founded in 2009.
The technique of using flash to replace RAM is
now standard practice and thrives in many SSD form factors.
that the low latency portion of this market could become plug compatible with
DRAM (and replace most of
the DRAM market) - were a factor in the flare up of
SCM DIMM wars in
business lessons learned from the fizzling out of "SCM DIMM wars 1" -
shortages of 2016/17 which should have assisted the flash tiered as RAM
concept - were that were that although "flash tiered as RAM" does
indeed provide useful outcomes it is in fact usable across a much
broader range of latencies than just the ultra-low latencies which the
NVDIMM-focused marketers had hoped would dominate these design-win
That's another reason I find the recent Netflix
technology blog interesting - because (although our industry talks much about
single digit microsecond memory fabric latencies) the Netflix case study
shows that high double digit microsecond latencies can be good
enough to replace most RAM.
observed during experimentation that RAM random read latencies were rarely
higher than 1 microsecond whereas typical SSD random read speeds are between
100500 microseconds. For EVCache our typical SLA is around 1 millisecond with a
default timeout of 20 milliseconds while serving around 100K RPS. During our
testing using the storage optimized EC2 instances (I3.2xlarge) we noticed that
we were able to perform over 200K IOPS of 1K byte items thus meeting our
throughput goals with latency rarely exceeding 1 millisecond. This meant that by
using SSD (NVMe) we were able to meet our SLA and throughput requirements at a
significantly lower cost."
Starting from that base - Netflix then
went a stage further in their software implementation and were able to achieve
typical latencies (with SSD rich caches) under 100 microseconds. ...read
FlashSystem 9100 |
|Editor:- July 18, 2018 - A recent blog -
the FlashSystem 9100 NVMe with FCM - by Barry Whyte at IBM - provided for me - a
satisfying sequel and finale to the story of whatever happened to the longest
running enterprise SSD accelerator product line in the history of the market -
the SAM>RamSan>FlashSystem - which were all
fast big shared memory boxes.|
(The new heir in the family saga -
the FlashSystem 9100 is a 2U box with NVMe SSDs inside which provides 403TB
usable uncompressed - and GbE, FC or SAS host connectivity.)
get a taster of the family story in these 2 marker articles - selected from
my numerous scribblings.
IBM's FlashSystem 9100?
the same kind of horse show (in
role) but with a different technology animal inside and the recent
changes in the design architecture today in 2018 are as significant as when TMS
redesigned the main memory array in the RamSan product line from RAM to flash in
their 2007 model - the
Barry Whyte's new blog says among things:-
storage development team in Hursley started work on the design of a new
generation box back over 3 years ago when I was still based in the UK. The idea
was to build a low rack density, and high performance control enclosure that
could take NVMe Flash drives, both in terms of NAND Flash based, and look to the
future of SCM technologies, such as 3D Xpoint, Z-SSD and whatever else will
come along." ...read
Editor's comments:- throughout the 30 or so years
history of the RamSan and the multi OS supported SAM - Shared Access Memory
system which came before and the new FlashSystem (which cane after (and which
may have changed its name again depending on when you read this) is the the
idea of a product line which evolves to accomodate new memory technologies but
retains the legacy purpose of putting data in a box where it can be accessed by
many different servers at the lowest practical latency cost.
of LTO-8 tape may be a good thing|
|Editor:- July 14, 2018 - I haven't written much
about tape drives and
tape libraries in recent
years (less than 8 news stories in 8 years) because the writing which had
already been appearing on the wall for a long time -
about the mainstream
migration away from tape - was still clearly legible despite having been
written long ago and crumbling in the dusty vaults of web pages deep down in
the logfile statistics.|
But a recent blog -
Reasons To Purchase LTO 8 Tapes - by UK tape reseller ODSI - prompted me
on linkedin with this.
#4 for liking this tape / LTO-8 (resistant to instant malware attacks because
data on tape is effectively offline) is a clever way to argue that a negative
feature can have positive aspects when viewed in a particular context. Shows
that the art of tape marketing sophistry hasnt been lost despite the demise in
significance of the tape market itself."
roadmap to the
|If you could go back in
time and take with you a factory full of modern memory chips and SSDs
(along with backwards compatible adapters) what real impact would that have?
|are we ready for
infinitely faster RAM?
/ more pages
|Radian samples dual port Open-Channel 2
SSDs with byte addressable NVRAM|
Editor:- July 24, 2018 -
it is sampling the first Open-Channel 2
compliant flash SSD in a U.2 form factor with up to 12TB of Flash, and uniquely
including up to 12GB of byte addressable PMR (Persistent Memory Region
style user NV-RAM) which can be memory mapped, or block addressable via
standard NVMe commands enabling hosts to control zero-copy transfers of data
between the flash and NV-RAM.
wrapping up 40 years of memories about endurance
July 20, 2018 -
wrapping up SSD
endurance (selective memories from 40 years of thinking about endurance) is
my new blog on the home page of StorageSearch.com
were plenty of other things to say about SSDs in that time - but somehow a
one dimensional view of SSD design - seen through the filter of endurance and
wear out - overly absorbed me and fascinated my readers for a long time. This
is my last article on endurance. No more. Ever. I promise. (I may have said
that before but this time I really mean it.) ...read the article
WD samples terabit QLC
Editor:- July 19, 2018 - Western Digital today
it has begun sampling 1.3Tb single chip nand flash chips using 96-layer QLC.
Micron and Intel agree to part ways on 3DX
July 16, 2018 - Intel
and Micron have
agreed to a parting of the ways on future 3DXPoint development.
today "Technology development beyond the second generation of 3D XPoint
technology will be pursued independently by the two companies in order to
optimize the technology for their respective product and business needs."
comments:- this shouldn't come as any surprise.
At a time when flash
and DRAM memory have been manufacturing-capacity constrained and other competing
(formerly emerging) nvms have been seeping into niche products assisted by
unlearning curve memory
reminiscent of OPEC oil price fantasies - Micron has reported that 3D XPoint
revenue has been significantly absent. At the same time - Intel has reaped
benefits from its (not so stickily captive as it used to be) processor base
for the past 2-3 years by merely talking about the possibilities of future
architectures which might use 3DXPoint.
These 2 differences in
perspective have stayed politely unresolved in corporate communications by both
companies in the past year - despite the underlying differences in outlook and
Here's some of what I said about this on linkedin.
may be Intel's new bubble memory / digital watch. One interpretation is that
Micron (a real memory company) has seen through the emperor's clothes. Another
interpretation is that Intel (a past tense systems company) believes it can mesh
together memory (which is a bit different but not that great) and customer
flexible glue logic and old processors to create a new effective type of
backwards compatible but forward looking memoryfied CPU platform.
CPU equivalence is the user
value proposition I wrote about in 2003 which was why the enterprise market
could adopt SSDs as a sustainable business model. Today the
of processors and the flattening of latency by SSD infrastructure means that
traditional complex multi level cache server processors are wasteful and will
become a niche. Looking forwards CPU and SSD equivalence exemplified in cloud
processors and in memory processing suggest that memory and processor companies
will have more reasons to become competitors rather than collaborators in
strategic designs in the cloud.
eASIC to be acquired by Intel
Editor:- July 12, 2018
- eASIC has
agreed to be acquired by Intel
- it was
Editor's comments:- For Intel this will strengthen and lengthen
its architectural chip supply engagements with customers who are looking for
customizable extensions to their data processing chip sets and who are at the
stage where they have a proven proprietary concept which they want to use in an
energy and performance footprint which is better than the FPGA implementations
enabled by products like those from Intel's earlier acquisition
Intel's earlier history (1970s to 1980s) its chipsets which supported common
functions around its processors helped the company remain at the center of
design and architecture decisions made by its systems customers. But because the
company's PC and standard server business was so successful it decided that it
didn't want to get involved with idiosyncratic customized consumer platforms
- a strategy which lost it the mobile phone and tablet markets.
had dabbled in the server grade ASIC and gate array markets in the late 1980s
when it gained access to IBM's custom IP. That experience - which was judged to
be a failure - showed that the custom business was more competitive and
more difficult for Intel than the safer option of extending markets for its
own standard processors.)
Today the biggest users of processors and
memory are cloud scale companies which are all (already or soon) designing
custom accelerators and useful chips sets to improve the effectiveness of their
infrastructures. FPGAs, customizable controllers and ASICs are all part of that
product mix. IP solutions like those from eASIC can be useful in applications
where the volumes and changeability of designs make ASIC too slow to market and
expensive - but the energy footprint and memoryfication requirements make FPGAs
a less than optimal fit for large volumes.
This acquisition will give
Intel greater visibility and flexible capability in the next wave of
application specific memory and processor enhancers.
glue chips in the SSD and
Samsung in production with next generation 90 layer V-NAND
July 10, 2018 - Samsung
mass production of a new faster generation of its V-NAND. Among other things
Samsung says about it:-
- the 90 layer 5th generation V-NAND has similar energy efficiency to the 60
layer previous generation. This is because the operating voltage has been
reduced from 1.8 volts to 1.2 volts.
- it has the fastest data write speed to date at 500µs, which represents
about a 30% improvement over the write speed of the previous generation, while
the response time to read-signals has been significantly reduced to 50µs.
- it's the first flash
to use of the 'Toggle DDR 4.0' interface. Samsung's new 256Gb V-NAND has
reached 1.4Gbps - 40% faster than its 64-layer predecessor.
Micron says patents claimed by UMC injunction in China were
already prior art in other countries
Editor:- July 5, 2018 - Micron
a statement about the recent injunction (see earlier story below)
related to the sale of certain memory chips and SSDs in China.
other things - Micron said...
- "The affected products make up slightly more than 1% of Micron's
- ""Micron is disappointed with the ruling by the Fuzhou
Intermediate People's Court. We strongly believe that the patents are invalid
and that Micron's products do not infringe the patents. The Fuzhou Court issued
this preliminary ruling before allowing Micron an opportunity to present its
- "Micron has submitted compelling evidence to the Patent Review Board
of China's State Intellectual Property Office demonstrating that the patents are
invalid because they are directed to technologies that were previously developed
and patented in other countries by other technology companies."
Micron memory sales in China at halt risk
July 3, 2018 - UMC today
the Fuzhou Intermediate People's Court of the People's Republic of China today
issued a preliminary injunction against Micron
Semiconductor - which effectively could prevent ongoing sales and
supply of 26 DRAM and NAND-related items in China.
UMC said - it
filed patent infringement lawsuits against Micron with the mainland China courts
in January, 2018, covering 3 areas, including specific memory applications
related to DDR4, SSD and memory used in graphics cards. "With today's
ruling, Micron's products now face injunction for violating UMC's patent rights
in a court verdict that applies to all of mainland China."
comments:-Just as tides follow gravity and the winds so too does geoplitics look
down from on high on the worldwide memory market which for many years had the
illusory guise of a defragmented, friction-free, borderless market. I wrote
about how those illusions were being blown away in my April 2018 blog -
can memory chips be
made in the wrong country?
Later:- (July 5, 2018) - Take a look
at this interesting comment from within the memory industry- from Sang-Yun Lee,
President & CEO at BeSang
today on linkedin ...
"I feel that it is a power game
between Micron backed by US government and UMC backed by China government and
its DRAM partner in China. In terms of memory IP, Micron should be much stronger
than UMC and its China DRAM partner. Though, intention of UMC and China
government is clear: cross license or settlement for the clear path to DRAM
market for China DRAM startups. Micron's intention was to give hard time to
China DRAM startups using its strong IPs. Unfortunately, Micron got a strong
counterpunch from China government." ...read
more comments related to this
memory systems design - 2018 horizons|
|Editor:- July 27, 2018 - Problems in memory
systems design, how to improve SSD and memory architecture and discussions
about what are the best ways to optimize processing platforms to incorporate
the realities of modern memory and its abilities and limitations (instead of
merely drafting in freshly minted new memory chips to play zombie roles in
idealogically bankrupt data ponzi schemes) have all been grist to the mill of
covered her on StorageSearch.com in recent years. |
When discussed in
different contexts - in the RAM controller, in the SSD controller, in the
processor design, on the motherboard and in the array fabric stretching to the
cloud - then different tactical approaches can be taken - but at the top level
they are all subdimensions of enabling data to be created, captured and used
effectively and economically.
I saw a succint summary of the deep
question - "move data or compute locally?" - yesterday on pages 183
to 187 of
Memory System Design Robustness, Energy, Performance (290 pages - pdf) - by
Professor Onur Mutlu
in a keynote he presented July 3, 2018.
"A memory access
consumes about 1,000x the energy of a complex addition."
movement is a major system energy bottleneck."
Need a Paradigm Shift to... make computing architectures more data-centric."
the 2nd half of this (long) paper Onur describes the state of advanced research
and thinking into proposing and evaluating design solutions which intersect
with the ideas of optimizing data movements and processing inside memory chips
and memory arrays. ...read
the article (290 pages - pdf),
more papers like this
by Onur Mutlu
what's RAM really? - RAM in an
Memory Summit - Lifetime Achievement Awards|
|Editor:- July 19, 2018 - As part of the
PR ramp up to next
month's Flash Memory Summit
the event team has
the winners of its 2018 Lifetime Achievement Award:- Dov Moran and Aryeh Mergi. |
inspiration from Intel's first flash products in 1988, Dov and Aryeh co-founded
Israel in 1989 with the vision of building devices based on flash memory.
was CEO, and Aryeh was CTO and later also ran Marketing and Business
Dov's numerous inventions at M-Systems include the 1993 DiskOnChip,
whose design was adopted by Nokia for embedded flash in its cell phones. He also
invented the 1999 DiskOnKey USB Flash Drive. Aryeh was the key driver behind
TrueFFS, a Flash Translation Layer architecture that was adopted by Microsoft
for an early flash file system.
M-Systems introduced numerous other innovative products under the
leadership of Dov and Aryeh, including flash-based SIM cards, smart USB drives,
encrypted USB drives, and very early 4-bit/cell NAND flash (now
called QLC). They
are both named inventors of numerous patents. SanDisk
company in 2006, and Western Digital purchased SanDisk in 2016.
|Editor's comments:- When you now look back on
you see it from the vantage point of the certainty that the SSD and
memoryfication market has become a big and influential market. In my long ago
written profile of M-Systems - I said - "For a company which hasn't been
around since 2006, M-Systems left deep footprints." |
proud and grateful to say that M-Systems was a customer of mine. M-Systems ran
SSD ads here on the mouse site in 2004 to 2006. This SSD news page looked a bit
different in July 2004 as you can see
- in the waybackmachine archive.
ScaleFlux and Codelucida|
|Editor:- July 18, 2018 - IT Brand Pulse
recently published its
Storage Brand Leaders June, 2018.|
Editor's comments:- among
the new catagories in this list is "Computational Storage" - and a
company I haven't written about before - ScaleFlux. Although I have written a
lot about computational storage by its other names (in-situ SSD processing,
processing in memory etc).
ScaleFlux - whose technology is packaged in
a traditional PCIe SSD
accelerator form factor - is one of 2 companies I noticed on the list of
companies exhibiting next month at FMS which are new to me.
is Codelucida which has
developed a patented version of LDPC-based ECC technology for flash SSDs which
provides superior error rates and decoding speeds with a much lighter overheads
in terms of bit coding in the data and also runtime CPU loads.
also:- DSP ECC in