|storage chip news|
|Avago agrees to acquire PLX|
June 23, 2014 - PLX
announced that it
has agreed to be acquired by Avago
Technologies for approximately $309 million.
"The core PLX
PCIe silicon business fits very well with the Avago business model and broadens
Avago's portfolio serving the enterprise storage and networking end markets,"
stated Hock Tan,
President and CEO of Avago. "Following the closing of the transaction, we
are excited to welcome the PLX team to Avago, and we are committed to continue
to invest in the PLX PCI Express platform."
comments:- to get a taste of the big ideas to come in PLX's PCIe fabric
vision see - an
SSD conversation with PLX
SanDisk agrees to buy Fusion-io
Editor:- June 17,
2014 - What will SanDisk
really get from Fusion-io?
- more usable flash petabytes out from the same raw wafer starts - due to better
architecture. ...more in
is it time for the SSD market to reconsider RapidIO?
May 14, 2014 - You'd think that with all the interfaces
already in use
within the enterprise SSD
market - there wouldn't be enough of a market gap to justify introducing
yet another one. - Particularly when that interface strays across low
latency server-storage territory which is dominated by
PCIe SSDs, under
attack by memory
channel SSDs and has been flanked historically by
thought so too.
But a recent article -
You Really Know RapidIO? - by Eric Esteve , founder of
IPnest says - "Maybe it's
time for the server/storage industry to give a second chance for the RapidIO
Editor's comments:- That's a bold statement -
coming as it does from someone who was involved in designing one of the first
generation PCIe controllers 10 years ago. Eric argues that the intrinsic fabric
architecture and routing support in RapidIO - would make many of the things
which architects are trying to do today - such as interconnecting large numbers
of servers and SSDs for example - easier and faster.
PCIe and Ethernet as sub microsecond CPU interconnects - view from
Micron's HMC controller team win design award
April 7, 2014 - Micron
that one of its design teams has been named "design team of the year"
by EE Times and EDN for the
design work - done in collaboration with Altera
- which led to the industry's first working
Hybrid Memory Cube
PLX is ready with 1st Gen3 PCIe switches
February 4, 2014 - PLX
announced it is
the 1st PCIe switch vendor to have achieved Gen3 compliance having passed the
compliance testing procedures of PCI-SIG.
Editor's comments:- the new standard doubles the maximum
data bandwidth of PCIe SSDs to 1GB/s per lane in each direction - which enable
32GB/s total throughput for a x16 link.
Express 3.0 Integrators List
Netlist says ULLtraDIMM SSDs infringe patents
Editor:- January 29, 2014 - Netlist today
it had filed motions to add two additional patents to the lawsuits against the
ULLtraDIMM memory module from
The 2 newly added patents (U.S. Patent Nos. 7,881,150
and 8,081,536) are generally related to load reduction, a critical feature in
low latency memory modules. Netlist has now asserted a total of 7 patents
against the ULLtraDIMM, in addition to trade secret theft, trademark
infringement and other claims.
"We have spent years developing
our industry-leading technology, and are encouraged by the progress we've made
defending our intellectual property in these lawsuits," said Netlist
President and CEO, C.K. Hong. "We
will continue to vigorously defend our IP, uncovering any and all theft of our
technology and infringement of our patents, and will not allow others to profit
from this unlawful activity."
in its 8-K last December, Netlist says it received a whistleblower letter
describing in detail how Diablo "stole Netlist's detailed architecture and
design" of its flagship product, HyperCloud, to create the ULLtraDIMM.
comments:- SanDisk's ULLtraDIMM is a
new class of
product in which cheap high capacity
MLC flash emulates many
DRAMs in a module which
contains little or no DRAM itself but which nevertheless plugs into a DDR3
In contrast - Netlist's "similar sounding but very
different" product families include real DRAMs which accomplish power
fail data protection aka non volatility - by means of fast backup and
restore to onboard flash - all in the same DDR3 module.
doesn't appear to be saying that it could design a product like the ULLtraDIMM -
because it doesn't to my knowledge have the
controller IP to do anything remotely similar.
Instead - what
Netlist appears to be saying is that techniques in DDR3 design - which enable
lots of circuitry to be placed behind a RAM interface - without placing too
much load on it and slowing it down - which Netlist has itself patented - are
suspected to have been used within the design of the ULLtraDIMM.
Diablo appoints new VP Engineering to advance Memory Channel
Editor:- January 23, 2014 - Diablo Technologies
the appointment of Jim
Miller as the company's new VP Engineering - in which rolse he will be
responsible for advancing the company's
Storage roadmap and engineering accomplishments. See also:-
Avago acquires LSI
Editor:- December 16, 2013 - LSI today
that it has agreed to be acquired by Avago
Technologies Limited in an all-cash transaction valued at $6.6
Editor's comments:- I hadn't heard of Avago before.
But I had heard of Agilent Technologies - the former name of this company -
which was a spinoff from HP. Avago was a semiconductor spinoff from Agilent.
Part of Avago's rationale (they're a semiconductor company with over 1/2 their
business in wireless technology) is to get into the enterprise storage market
and become a leader in this market "overnight".
A big chunk of the investment - about $1 billion is coming from
Silver Lake - a
VC company - which a
few years ago reintegrated another company in the SSD market -
SMART. The rest of
the funding is coming from bank loans.
MOSAID resumes the conversation about HLNAND
September 23, 2013 - Growing market demands for capacity and performance in
the enterprise SSD market is highlighting the intrinsic weaknesses in standard
flash memory interfaces.
That's the theme of a recent blog -
HyperLink NAND technology and scalability by Peter Gillingham, VP
and CTO Conversant
(the new name for MOSAID Technologies) who writes - "In the
space, where PCIe is
often used to connect storage hardware, SSDs require as many as 25 to 50
channels to provide the throughput demanded by the system interface... but even
2nd generation flash interfaces such as ONFi and toggle mode are not up to the
Editor's comments:- MOSAID - which will legally
its name to Conversant in January 2014 - first started talking about its
HLNAND architecture in
May 2007. But the
company - which recently changed its name - has been licensing its patents in
fast memory systems design since
Among the many reasons - why the company says its
simplifies the design of ultra high bandwidth scalable SSDs (pdf) are the
low loading on each device which means that latency is not degraded to the
same extent by capacitive bus load as in traditional memory topologies.
Seagate invests in eASIC
Editor:- August 5, 2013 -
it has got a strategic investment from Seagate.
has demonstrated innovative custom silicon technology with our... solid state
hybrid drives" said Rocky Pimentel,
chief sales and marketing officer at Seagate. "eASIC's ability to quickly
develop custom solutions while meeting stringent cost, power and performance
requirements will enable us to rapidly improve our product position in both
SSD and SSHDs."
Overview of PCIe topologies for enterprise SSDs
July 17, 2013 - PLX
Technology recently published a white paper -
and PCI Express - which gives an overview of past, current and future PCIe
SSD connection topologies along with a list of detailed reference articles.
interface chips and IP,
7 silos for enterprise
the challenges facing ULL SSDs
April 29, 2013 - StorageSearch.com today published
a new article -
Storage SSDs - will the new ultra low latency SSD concept fly? - should you
book a seat yet?
Hybrid Memory Cube spec ready for chip designers
April 3, 2013 - back in
October 2011 - I
reported on this page the formation of a new industry
ORG - the Hybrid Memory Cube Consortium
- which could have an impact on future SSD packaging densities.
takes a while to get these things going - but according to
press release this week by one of the founding companies - Micron - the 100 plus
companies which are collaborating in this enterprise have agreed on an
A key feature of the new multiplane memory
architecture is that distributed memory controllers in an HMC module will
handle the data I/O packet requests for the bunch of stacked memory chips in its
own vault. This is similar to the distributed intelligent data mover concept
which is already used in all proprietary
SSD controller designs - because it's the only way you can get good
aggregated global system performance while also dealing with low level
local memory management issues at low latency.
As with earlier
generations of remote distributed memory interfaces - such as
InfiniBand - HMC is
designed to optimize the request of small packets - which in the case of HMC is
16 to 128 bytes of data.
With today's semiconductor speeds -
accessing the data in those distributed memory chips within the same HMC module
presents similar technical problems to distributed memory cards in traditional
computer designs - because traversing inches of physical space at high speed is
as difficult as moving data across tens of feet at slower speeds.
has been born as a DRAM
technology - but don't ignore it - just for that reason. (Or because the data
packet sizes are small compared to the block sizes in
nand flash.) If and when
these HMC packaging ideas result in viable products - the ideas and
methodologies will spill into SSDs too -regardless of what the underlying
memories used in SSDs may be at that time.
It's all about speed and
scalability. According to the HMC
faqs page - A single (1st generation) HMC unit can provide more than 15x
the bandwidth of a DDR3 module. See also:-
SSD interface glue chips.
Crocus steers R&D efforts to simplify and accelerate
adoption of magnetically enhanced semiconductors
21, 2013 - Crocus
appointment of Dr.
Ken Mackay as VP of technology development in which role he will manage
and overview nano-magnetic materials research and CMOS teams - within the
company and in partner organizations - towards the goal of fully integrating
Crocus' magnetically enhanced semiconductor technology to the needs of
Proton gets funds to rejuvenate flash
February 7, 2013 - Proton
Digital Systems today announced
the completion of its $2 million seed round to support continued development
and expansion of its LDPC-based flash read channel IP products that increase
and longevity of
Proton's IP is currently licensed for enterprise and consumer applications and
has already been adopted by some of the world's largest flash memory companies.
and DSP IP in SSDs,
how to market flash
management care schemes for SSDs
Editor:- February 1, 2013 -
Is PCIe the Natural
Next-Generation Data Center Fabric?
That's what Larry Chisvin, VP of
strategic initiatives PLX
Technology believes and he'll try to convert you to his way of
thinking next week at
the Linley Tech Data
Center Conference in Santa Clara. PLX is the worldwide market leader in PCIe
enterprise SSD silos,
SSD glue chips.
Diablo sets up compatibility team for new SSD interface
Editor:- January 29, 2013 - Diablo Technologies
it has set a compatibility advisory team for its new SSD interface - which
the company is apparently positioning as a faster alternative to
we prepare to launch our line of Memory Channel Storage products that enable
next-generation enterprise server and storage system designs, we have set our
sights on unprecedented levels of performance for current and future
applications To that end, we have
a group of top industry innovators to help refine the development of our
revolutionary NAND-flash system solutions..." said Diablo's CTO - Maher Amer.
Cypress article re nvSRAMs in fast SSDs
November 5, 2012 - A
article in EETimes discusses the theoretical advantages of using nvSRAMs as
the RAM cache in enterprise
SSDs in the context of simplifying design for
sudden power loss.
The author Pramodh Prakash
Semiconductor describes how the company's
nvSRAMs transfer data in
a parallel cell by cell operation from run-time RAM to down-time SONOS in about
Back in September 2008 (in a comment which can still be seen in
the hybrid SSDs
page) I too speculated that this technology from Cypress might find uses in
fast flash SSDs.
Now I have doubts, however. And here are my reasons.
- Cypress's nvSRAMs still require hold up capacitors - to support the store
to nvm operation - although they don't need as much capacitance as DRAM
My guess is that this technology could still be
useful if it was integrated as a small part of an
SSD controller chip
(supporting the very low capacities needed by skinny designs) - but a lot of
fast enterprise SSD controllers are implemented by FPGAs or eASICs. FPGA makers
would have to preguess how much capacity to offer in their chips - because the
SONOS cells require a mask level design - not simply a firmware routing.
- Cypress's nvSRAMs offer memory capacity (16Mb sampling) which is too small
to be useful in any of the
RAM flash cache
SSD architectures I know about. Too big for skinny designs and too small for
the Future of Semiconductor Memory
September 18, 2012
- "Anybody can produce 100K chips, but it's a whole different beast to
produce 80 billion chips. Resistive, phase change, any technology - it's how to
make the transition from 100K to 80 billion" said Bill Gervasi,
Discobolous Designs in
a discussion at MemCon about the
manufacturability of new memory types such as RRAM, MRAM and PCM -
Future of Semiconductor Memory.
IDT samples controllers for NVMe compatible 2.5" PCIe SSDs
August 21, 2012 - IDT
it's sampling single chip NVMe
compatible flash SSD
controllers for designers in the
PCIe SSD market.
models are available:- a 16-channel with PCIe x4 Gen 3 (89HF16P04AG3
for smaller footprints such as the
2.5" PCIe SSD
market - supports upto 2TB capacity) and 32-channel with PCIe x8 Gen 3 (89HF32P08AG3
for the conventional size cards upto 4TB capacity) - in 27 x 27 mm and 40 x 40
mm FCBGA packages respectively.
Both products support connection to 2
hosts and failover for
comments:- for those of you who like videos - I suggest you see
video which starts with an introduction to acceleration SSDs, explains the
advantages of having a standard such as NVMe - which means that oems can have a
single common set of drivers which work with SSDs from multiple vendors and
describes more features of the products - including hot pluggability.
the future of PCIe SSDs - series 6, episode 192 - will the
Semicos take it all?
Editor:- July 24, 2012 - You can see how an
anticipated 45 second discussion with
Texas Memory Systems
about bootable PCIe SSDs turned into a 45 minutes discussion about the future
of the PCIe SSD market on the SSD
news page today.
Virtium screens for cooler running DRAM
13, 2012 - Virtium
Technology has launched a new range of
low power DDR3L
memory modules - in 4GB and 8GB capacities - which have been designed
using a combination of techniques including screening for lowest total
electrical current and thermal-relief copper pour methodology PCB design.
This reduces DRAM surface temperatures up to 10°C which can
also increase performance in hot systems - because the need to perform double
refresh rates (at or above 85°C) is obviated.
SSDs and USB 3
Editor:- June 13, 2012 -Does
my NAND flash need USB 3.0? - is a good summary of the value that USB 3
can bring to the SSD market - written by Eric Huang, at
BiTMICRO acquires mixed signal IP assets from QualCore
June 5, 2012 - BiTMICRO
obtained over 600 IP assets from QualCore
whose portfolio includes analog, digital, and mixed-signal IC design.
Engineers retained from QualCore's IP and ASIC services team have joined the
recently established BiTMICRO India. The acquisition also brings BiTMICRO
closer to its goal of bringing the entire development cycle in-house, from ASIC
design to characterization testing.
MOSAID samples high density fast flash modules for SSD makers
April 3, 2012 - MOSAID
that it is sampling a 16 die NAND flash stack integrated with its
HLNAND bridge interface
in a single 100-ball BGA measuring 18mm x 14mm - which provides 512GB raw
capacity and 667MB/s aggregate simultaneous R/W throughput as a building block
for use by SSD oems to build multi-terabyte SSDs with GB/s throughput by
adding their own SSD
MOSAID's VP of R&D - Jin-Ki Kim said
- "HLNAND's ring architecture allows a virtually unlimited number of NAND
die to be connected on a single channel without performance degradation."
Greenliant ships industrial secure SATA NANDrives
February 28, 2012 - Greenliant
volume shipments of its
rugged SATA SLC
SSDs on a chip (BGA -
14mm x 24mm x 1.95mm) -
GLS85LS - which have upto 8GB capacity, 70/60MB/s R/W, include zoneable
password security and
fast erase, and
strong power fail data
Rambus gets into the nv memory IP market
February 6, 2012 -Rambus
it has acquired Unity
Semiconductor for an aggregate of $35 million in cash.
part of this acquisition, the Unity team members have joined Rambus to continue
developing innovations and solutions for next-generation
Intel buys InfiniBand line from QLogic
January 24, 2012 - Intel
an agreement to acquire the
40Gbps (pdf) related product lines, IP and business assets of QLogic.
SandForce nominated in GSA awards
8, 2011 - SandForce
has been nominated for the
Global Semiconductor Alliance Awards - in the category "most respected
private semiconductor company."
Volume shipments of 16Kb self powered EEPROM
November 4, 2011 - STMicroelectronics
volume production of a new type of dual function RFID 16Kbit EEPROM which
harvests energy from ambient carrier wave energy to power attached
The energy harvesting capability of the EEPROM will enable new types
of miniaturized electronics. ST has demonstrated the
energy-harvesting wireless memory by illuminating indicator LEDs. Other
potential applications include e-paper devices such as electronic shelf labels
and personal healthcare products.
Editor's comments:- the Russians pioneered the concept of harvesting
radio energy to power circuits. In 1952 a bug was found in the US embassy in
Moscow which was powered when bombarded with microwaves from a nearby building.
It was built into a wooden model of the
Great Seal of the US
which had been given to the ambassador as a present. ...from the book -
GCHQ, by Richard
BiTMICRO nurtures chip design training in Philippines
October 25, 2011 - the
Bruce Institute of Technology is
a new training institute in the Philippines - focused on microchip design -
which has been set up in a collaborated effort led by BiTMICRO in
partnership with Synopsys,
The name celebrates the family name of the Bruce
brothers - who founded BiTMICRO in
an ASIC design consultancy - before embarking on their pioneering market
developments in flash SSDs.
BiTMICRO's Chairman and CEO, Rey Bruce
said "The Philippines' traction in the global microelectronics industry is
almost entirely concentrated in assembly, fabrication and manufacturing.
BiTMICRO is practically the only Filipino founded and owned company engaging
into actual microchip design and engineering. We will do our part in uplifting
the industry to higher valued services and service capabilities with the
technology and products that we develop and produce in the country but this will
be not enough. Our goal with BIT is replicate our success at BiTMICRO in
developing microelectronic design skills."
Rudy Bruce, President of BIT, said "We hope to eventually build a
critical mass of locally developed engineers that can make the Philippines a
favored destination of the world's best microelectronic design companies. We
still believe in the Filipino's ingenuity and their ability to be relevant in
the world stage."
Hybrid Memory Cube will enable Petabyte SSDs
October 7, 2011 - Samsung
and Micron this
week launched an new industry initiative - the Hybrid Memory Cube Consortium
- which will standardize a new module architecture for memory chips -
enabling greater density, faster bandwidth and lower power.
is unlike anything currently on the radar," said Robert Feurle,
Micron's VP for DRAM Marketing. "HMC brings a new level of capability to
memory that provides exponential performance and efficiency gains that will
redefine the future of memory."
OCZ nabs PLX team to speed new PCIe SSDs
October 5, 2011 - OCZ
has has agreed to acquire the
UK Design Team
(approximately 40 engineers located in Abingdon) and certain assets from PLX Technology which will
enable OCZ to accelerate the development of its next generation of SSDs -
while also reducing development costs.
Editor's comments:- in
addition to traditional storage interfaces - PLX's special focus in the past
year has been technologies related to faster
Samsung acquires more nv RAM IP
Editor:- August 3,
Grandis - an
RAM company which has been developing spin transfer torque random access
world's first PCIe PCM SSD
Editor:- June 14, 2011 -
NVSL ( the Non-Volatile Systems
Lab at UCSD) recently
a prototype PCIe PCM (phase-change memory) SSD - with R/W speeds upto 1.1GB/s
and 327MB/s respectively and 8GB usable capacity.
A spokesperson for
the Moneta SSD design team - Professor
Steven Swanson said "...Moneta gives us a window into the future of
what computer storage systems are going to look like, and gives us the
opportunity now to rethink how we design computer systems in response."
Swanson says he hopes to build the 2nd generation of the Moneta
storage device in the next 6 to 9 months and says the technology could be ready
for market in just a few years as the underlying phase-change memory technology
Editor's comments:- in a white paper
PCM Storage Array (pdf) the team outlines the design and architecture of
their PCM SSD prototype and also compares aspects of performance with entry
level PCIe flash SSDs from
Fusion-io. ...read my views
STEC shifts from FPGAs to ASICs in ZeusIOPS
May 10, 2011 - STEC
announced it will transition the hardware used in its high performance
ZeusIOPS (2.5" and
3.5") SSDs from a
dependence on FPGAs to ASICs. And the same ASIC design will be used in
new PCIe SSDs later
STEC also announced that its revenue in the most recent
quarter was back in alignment with the growth rates for the enterprise SSD
market - following a decline in the preceding year attributed to over
stocking by its biggest customer
TMS updates SSD patents list
Editor:- May 3, 2011
- new (to me) is a
patents directory on Texas Memory Systems'
website which lists the company's US patents which are mostly related to
ensuring the integrity
of data in fast SSDs.
The most recent - issued a few weeks ago -
is related to dealing with timing skews which occur in all digital systems -
but which become more significant when data throughput approaches the speed
limits of the associated chip driver technology and board layout environment.
The patent covers a TMS technique for fine tuning set-up and hold times and
extracting reliable data. Other TMS patents in the last year relate to variable
size page data striping in flash arrays and a scheme for reducing
disturb errors. See also:-
patents (editor mentions on StorageSearch.com).
Anobit sources vital analog IP for SSDs
April 12, 2011 -
announced it has licensed IP cores from Cosmic
Circuits for several of its SoCs.
The analog IPs which consisted of linear regulators, a
and a silicon oscillator (with integrated clock multiplier) were implemented in
65nm CMOS process. These IPs were integrated into Anobit's
flash memory controllers
to enhance reliability
Blechman, VP R&D at Anobit said, "We had a need for a diverse
set of IPs, and were looking for a supplier who had proven expertise in each of
these areas. Cosmic fit the bill perfectly. With the strong support provided by
their team, we were also able to quickly address any integration issues, making
the process smooth and seamless."
comments:- although this press release only gives partial details of the
IP supplied (which relate to managing
power loss) I'm also guessing that Cosmic's ADC technology might also be in
Anobit uses DSP techniques to get better discrimination of
the state represented by stored charge in MLC flash. Sampling that charge itself
is an error prone process - but the "disturbance noise" filtering by
DSP can produce more reliable results if you can improve the ADC's resolution
or repeatability. Even a small incremental improvement or tweak in design at
this end can produce dramatic increases in
PLX ready to play part in PCIe SSD growth
March 16, 2011 - PLX
working with system partners worldwide to accelerate adoption of PCIe SSDs.
has been providing PCIe switches to manufacturers of both
SSD based storage solutions
for years and has 65% market share in this segment. PLX is a founding member
of the (Intel led)
Memory Host Controller Interface (NVMHCI) Work Group whose goal is to enable
the broad adoption of SSDs
products have attracted significant interest over the past few years," said
Yang, principal analyst for memory and storage at
Express-based products will be the primary catalyst for the segment with 40%
compound annual growth rate in shipments through 2015."
OCZ acquires Indilinx
Editor:- March 14, 2011 - OCZ today announced it has
signed a definitive agreement to acquire Indilinx for for
approximately $32 million of OCZ common stock.
Intel publishes new standard to increase efficiency of PCIe SSDs
March 1, 2011 - Intel
published version 1.0 of a new proprietary standard for designers of
PCIe SSDs in systems
which use Intel processors - the
NVM Express Optimized PCI
Express SSD Interface.
The interface efficiently supports
multi-core by ensuring thread(s) may run on each core with its own queue &
interrupt without any locks required. For enterprise class solutions, there is
support for end-to-end data protection, security & encryption capabilities,
as well as robust error reporting and management capabilities.
says that more than 70 companies have contributed to the standard - which will
make it easier to write software drivers which support multiple vendors. The
new standard will also make it easier for oems to adopt new SSD products from
alternative vendors which implement a consistent feature set.
Link_A_Media sues Marvell re HDD data integrity IP
February 16, 2011 -
has filed a lawsuit against Marvell asserting that
Marvell has infringed on Link_A_Media's U.S. Patent No. 7,590,927 ("Soft
Output Viterbi Detector With Error Event Output").
In the complaint, Marvell is accused of willfully and deliberately
manufacturing and selling read channel products for storage devices that
infringe the '927 Patent. Link_A_Media is seeking monetary damages and an
injunction to stop Marvell from continued infringement of the company's patent.
Link_A_Media 's CEO, Hemant K. Thaparcommented
that, "Link_A_Media's pioneering work enables manufacturers of
hard disk drives to
increase the storage density of
mobile storage devices
and to lower manufacturing costs for these products. We intend to enforce and
defend the intellectual property on our work to ensure that Link_A_Media's
inventions are not unfairly exploited."
Business opportunities from Intel's imperfect bridge chips
February 9, 2011 -
Knowingly Sells Faulty Chipsets. are they Crazy? is a new article on PCWorld.com which discusses how Intel
is dealing with the issue of a bridge chip with known defects in some
rarely read that publication because my interests are enterprise storage and
SSDs - but the author Keir Thomas
had linked to StorageSearch.com from another recent article he wrote -
SSDs are Doomed (at Least for Now) - which showed up in my web stats.
I started my storage
reliability directory in 2006 - I knew that large storage vendors would ship
flaky SSDs and hard
drives - but I assumed that would be due to the unwitting and creeping use of
and testing methodologies
- rather than deliberate business decisions.
characteristic of this Intel chip is that if oems populate all the
RAM slots which it "supports"
- the speed drops down to unattractive levels.
But that's not bad
news for everyone. Adrian Proctor,
VP of of Marketing at Viking
told me last month it means there's a growing population of DIMM slots on
motherboards which can't be used for RAM - but could be used instead to save
space and power by installing their
SSDs to replace HDDs as boot drives. Other companies make
1 inch and smaller SSDs
companies you can trust to speed your SandForce SSD to market
January 31, 2011 -SandForce
has started a directory of companies, tools, technologies and services to
help SSD designers integrate its
SSD processors and get
them to market more quickly.
Each member company in the new
Trusted program ensures that their products and/or services fully
support SandForce SSD Processors and provides response to SandForce customer
inquiries within 24 hours while committing to high-priority support for fastest
Editor's comments:- 6 out of the 7 initial
companies in the new program provide
test / design verification
new report looks at NAND flash succession
January 11, 2011 - Forward Insights
and its research collaborators have compiled an in-depth, independent analysis
which analyzes the options for various
non volatile memory
technologies which could become viable in storage after floating gate NAND flash
hits fundamental scaling limitations
NAND? (pdf outline) is the product of experts in floating gate and charge
trap flash, and resistive and emerging memory technologies. This new report
(price $10k) evaluates 3D NAND and cross point memory concepts from Hynix,
Intel, Macronix, Micron, Samsung, SanDisk, Toshiba and Unity and concludes with
a roadmap till the end of the decade.
will Micron's enhanced flash memory really eliminate error
Editor:- December 3, 2010 - Micron recently
announced availability of enhanced 16GB to 64GB 25nm
flash memory chips with integrated error management - which the company
says - removes the burden of ECC from the host and simplifies the use of flash
in enterpise apps.
Editor's comments:- as discussed in my recent article -
management in flash SSDs good blocks and less good blocks have always
coexisted in flash memory. But as device geometries shrink (to increase
capacity and speed) the margin of error between usable and non usable cells has
shrunk too. In practical terms this means that the raw media quaility of new
flash chips has declined in the past decade from under 1% defects, then 2%, 5%
and I've seen projections as high as 10% for emerging MLC.
read longer version of
new article - bad block management in flash SSDs
November 26, 2010 - StorageSearch.com
today published a new article -
bad block management in flash SSDs.
It's a non technical
introduction to the thinking behind one of the many vital functions inside a
flash SSD controller.
The new article - started out life this morning as a long email reply to one of
my readers. ...read
new book - Inside NAND Flash
Editor:- November 17,
2010 - Forward
Insights (an SSD
analyst company) is one of the contributers to a new book called -
NAND Flash Memories.
The publishers say that
SSD designers must
understand flash technology in order to exploit its benefits and countermeasure
its weaknesses. The new book is a comprehensive guide to the NAND world -
from circuits design (analog and digital) to
News to me - Seagate has MRAM technology
November 5, 2010 - an interesting article on Denali's blog site
relationship with MRAM.
Web-Feet reports on Storage Class Memories
October 18, 2010 - Web-Feet
Research has just released its latest technology assessment report on
Flash Memory, DRAM and the rise of alternative Non Volatile Memories and Storage
Class Memories in -
(summary pdf) - price $7,500.
This new report evaluates the
most promising SCM memories: PCM, STT-RAM, MRAM, Z-RAM, ReRAM, CBRAM, QsRAM,
and FeRAM. The manufacturability of SCM storage is evaluated for: CMOx, PCM-S,
RRAM-S, 3D NAND and some claims that SST-MRAM can fulfill the storage function.