| hold up
capacitors in 2.5" MIL SSDs|
do you really need them?
Editor:- I've been looking at different aspects
of power hold up schemes in mission critical non volatile memory systems for
over 30 years. |
But every time I revisit this vast topic and compare
fresh examples from the market - I learn something a little bit new.
to three seconds - demonstrates the extreme range of hold up times
now in the market inside leading edge 2.5" military flash SSDs.
|flash wars in the
enterprise - MLC brand X|
|First you learned about SLC (good flash).
Then you learned about MLC (naughty flash when it played in
the enterprise - but good enough for the short attention span of consumers).
Then MLC SSDs learned how to be good.
Now some MLC is much nicer than others. - When it's preceded by an "e"
(extra-good). But it costs more.
But other people say you don't need
the expensive "e" - because their controllers empathize better
with naughty flash. (They really care about naughty flash being sent to bad
block jail too soon.)
Is your head ready to explode yet?
It's going to get even more complicated.
sugaring MLC for
|How big was the
thinking in this SSD's design?|
|Does size really does matter in SSD
By that I mean how big was the mental map? - not how many
inches wide is the SSD.
The novel and the short story both have their
place in literature and the pages look exactly the same. But you know from
experience which works best in different situations and why.
it comes to SSDs - Big versus Small SSD architecture - is something which was
in the designer's mind. Even if they didn't think about it that way at the time.
||For designers, integrators,
end users and investors alike - understanding what follows from these simple
choices predicts a lot of important consequences. ...read the article|
|3 things that could have
killed flash SSDs|
emerging size of
the flash SSD market as you see it today was by no means inevitable. It owes a
lot to 3 competing storage media competitors which failed to evolve fast enough
in the Darwinian jungle of the storage market in the
One of these 3 contenders is definitely on the road to extinction -
but could one of the other 2 still emerge to threaten flash SSDs?
SSD's past phantom
demons explores the latent market threats which hovered around the flash SSD
market in the past decade. They seemed real and solid enough at the time.
|| Getting a realistic
perspective of flash SSD's past demons (which seemed very threatening at the
time) may help you better judge the so-called "new" generation of nv
memory contenders - which are also discussed in the article. ...read the article|
|this way to the Petabyte
|In 2016 there will be
just 3 types of
SSD in the datacenter.|
of them doesn't exist yet - the bulk storage SSD.
It will replace the
last remaining strongholds of
hard drives in the
datacenter due to its unique combination of characteristics, low running costs
and operational advantages.
||The new model of the
datacenter - how we get from here to there - and the technical problems which
will need to be solved - are just some of the ideas explored in this
CPUs in SSDs|
flash and other nvm
what's RAM really?
memory channel SSDs
what changed in SSD
sudden power loss
|storage chip news|
|PMC-Sierra agrees to be
acquired for $2 billion |
Editor:- October 6, 2015 - PMC-Sierra has
agreed to be acquired by Skyworks
for $2 billion it was
"With our acquisition of PMC, Skyworks will be
uniquely positioned to capitalize on the explosive demand for high performance
solutions that seamlessly connect, transport and store Big Data," said David J. Aldrich,
chairman and CEO of Skyworks. "Specifically, we plan to leverage PMC's
innovative storage systems, flash controllers, optical switches and network
infrastructure solutions to expand our engagements with some of the world's
leading OEMs and ODMs as well as
data center customers."
Atmel - who?
Editor:- September 22, 2015 - It had
long time since I last heard from Atmel (November 2005
according to my inbox - and that was about DVD chips) but 10 years is not so
long that I had entirely forgotten that they once had a distant connection to
the SSD market.
So when I saw an article alert to -
and Atmel, 2 cultures to build 1 successful company? - by Eric Esteve, founder of
company IPnest - that was my
way of learning the recent
that Dialog Semiconductor
(which is not an SSD company) will acquire Atmel for $4.6 billion.
who worked for Atmel at the time writes - "In year 2000, Atmel had more
than $1,500 million of revenue from flash..
But he goes on to say
that in 2014 "their flash product line was almost dead" - however
they had "about $150 million of revenue related to other nvm".
article reassured me that although my eye had been off the ball of Atmel - there
may have been good reasons (from an SSDcentric context). And it's a great way to
wrap up the story of a company from the history archive. ...read
2.5 to 3D architectures point the way to DDR4's successor says
new blog on SemiWiki.com
Editor:- July 12, 2015 - "DDR4 will
be the last version of the DDR interface route for RAM, don't ever expect to see
DDR5" - says Eric Esteve
in his blog -
High Bandwidth Memory to Select after DDR4? - on SemiWiki.com - in which - as part of
getting us to contemplate the big architecture picture - he also says - "DDR4
is not only the last DDR, it's also the last protocol based on 2D (layers)
the article, SSD glue chips,
RAM in an SSD context
Avago agrees to acquire Broadcom
Editor:- May 28,
2015 - Avago
will acquire Broadcom
for approximately $37 billion.
IP-Maker's NVMe IP passes UNH-IOL's compatibility
May 22, 2015 - IP-Maker
- which is represented in the US by Fides
Sales - today announced that its
data transfer manager design has passed the
UNH-IOL compatibility tests and is now
listed on their NVMe
compatibility integrator's list.
IP-Maker's IP supports
performance in the range of 350K IOPS and 10µs latency in a Gen2 x4
"We are pleased to announce this important
milestone", said Mickael
Guyard, co-founder of IP-Maker. "We are now able to provide a
compliant and high performance NVMe solution, helping storage companies to
develop PCIe SSD in a
reduced design time."
Microsemi acquires Vitesse
March 18, 2015 - Microsemi
it has agreed to acquire Vitesse Semiconductor
for approximately $389 million.
Vitesse designs a diverse portfolio of high-performance
semiconductors, application software, and integrated turnkey systems solutions
for carrier, enterprise and
Avago acquires Emulex for $600 million
February 25, 2015 - In 2014 - Avago Technologies -
which until then had not seemed much involved in enterprise storage -
suddenly got religion.
As a heavyweight interface chip and IP maker in other markets Avago
must have asked themselves - what are the key interfaces we need to be the #1
enterprise storage connect company? - especially
enterprise storage becomes solid state.
that's the way to interpret the acquisitions (last year) of
PLX followed now (as
today) by the acquisition of
Emulex - for
approximately $606 million.
Northwest Logic has FPGA support for Everspin's MRAM
February 9, 2015 - Northwest
controller support for Everspin's
ST-MRAM - with interoperability proven on a Xilinx Virtex-7 FPGA platform.
MRAM's core IP also supports traditional volatile DDR3 SDRAM - so the
new support for MRAM will simplifiy the design of
protected low latency
Mobiveil supports Spansion's HyperBus NOR
Editor:- February 3, 2015
it will provide authorized controller support for Spansion's
flash chips are low capacity, low pin count, faster (5x) NOR flash (BGAs)
suited for some applications in the automotive electronics market.
HyperBus flash interface
IP (pdf) delivers upto 333MB/s using this 12-pin interface.
Microsem licenses DPA countermeasures from Rambus
January 29, 2015 -
will serve as reseller in the government and military sectors for certain
differential power analysis (DPA) technologies developed by Rambus's
cryptography research division.
As the first major FPGA company to
countermeasures, Microsemi has identified DPA as a significant vulnerability
in chip security, specifically for the mission-critical applications found in
government and military
Emulex's 16GFC technology supported by DataCore
January 28, 2015 - Emulex
today announced that DataCore is
releasing target mode support in its new SANsymphony V10 software-defined
storage platform, for Emulex's Gen 5 (16GFC) HBA technology.
also:- SSD software,
Novachips acquires HLNAND
Editor:- January 26, 2015 -
it has signed a definitive agreement to acquire
HyperLink NAND fllash
memory technology assets, including approximately 260 related patents, from
(formerly known as MOSAID).
Due to its low capacitance expansion
footprint - HLNAND enables large-capacity SSDs.
GUC announces new low power SSD IP portfolio
September 25, 2014 - Global Unichip
out an expanded interconnect low power IP portfolio for ASICs targeting SSD
The expansion covers ultra low power PCIe 3/4 PHY,
DDR3/4, LPDDR3/4 CTRL/PHY and ONFi4.0 IO/PHY. IP based on the 28HPM/HPC
processes in the expanded portfolio are available now, while 16nm macros will be
available in Q4 of this year.
Among all NAND applications Global
Unichip says SSD is the fastest growing with the Data Center and Enterprise
segments showing the greatest potential. GUC is meeting that demand with a
complete low power IP portfolio for SSD controllers, including NAND I/O (ONFI,
Toggle), DDR I/F (DDR3/4, LPDDR3/4) and Serdes I/F (PCIe-3/4, SATA3/SAS3).
Dell uses Avago's 12Gb/s SAS chips in new RAID systems
September 10, 2014 - Avago Technologies
that Dell has
selected Avago's 12Gb/s SAS technology (recently acquired from
LSI) for use in
RAID controllers in Dell's new PowerEdge Servers. See also:-
storage glue chips
Avago agrees to acquire PLX
Editor:- June 23, 2014 -
announced that it
has agreed to be acquired by Avago
Technologies for approximately $309 million.
"The core PLX
PCIe silicon business fits very well with the Avago business model and broadens
Avago's portfolio serving the enterprise storage and networking end markets,"
stated Hock Tan,
President and CEO of Avago. "Following the closing of the transaction, we
are excited to welcome the PLX team to Avago, and we are committed to continue
to invest in the PLX PCI Express platform."
comments:- to get a taste of the big ideas to come in PLX's PCIe fabric
vision see - an
SSD conversation with PLX
is it time for the SSD market to reconsider RapidIO?
May 14, 2014 - You'd think that with all the interfaces
already in use
within the enterprise SSD
market - there wouldn't be enough of a market gap to justify introducing
yet another one. - Particularly when that interface strays across low
latency server-storage territory which is dominated by
PCIe SSDs, under
attack by memory
channel SSDs and has been flanked historically by
thought so too.
But a recent article -
You Really Know RapidIO? - by Eric Esteve , founder of
IPnest says - "Maybe it's
time for the server/storage industry to give a second chance for the RapidIO
Editor's comments:- That's a bold statement -
coming as it does from someone who was involved in designing one of the first
generation PCIe controllers 10 years ago. Eric argues that the intrinsic fabric
architecture and routing support in RapidIO - would make many of the things
which architects are trying to do today - such as interconnecting large numbers
of servers and SSDs for example - easier and faster.
PCIe and Ethernet as sub microsecond CPU interconnects - view from
Micron's HMC controller team win design award
April 7, 2014 - Micron
that one of its design teams has been named "design team of the year"
by EE Times and EDN for the
design work - done in collaboration with Altera
- which led to the industry's first working
Hybrid Memory Cube
PLX is ready with 1st Gen3 PCIe switches
February 4, 2014 - PLX
announced it is
the 1st PCIe switch vendor to have achieved Gen3 compliance having passed the
compliance testing procedures of PCI-SIG.
Editor's comments:- the new standard doubles the maximum
data bandwidth of PCIe SSDs to 1GB/s per lane in each direction - which enable
32GB/s total throughput for a x16 link.
Express 3.0 Integrators List
Netlist says ULLtraDIMM SSDs infringe patents
Editor:- January 29, 2014 - Netlist today
it had filed motions to add two additional patents to the lawsuits against the
ULLtraDIMM memory module from
The 2 newly added patents (U.S. Patent Nos. 7,881,150
and 8,081,536) are generally related to load reduction, a critical feature in
low latency memory modules. Netlist has now asserted a total of 7 patents
against the ULLtraDIMM, in addition to trade secret theft, trademark
infringement and other claims.
"We have spent years developing
our industry-leading technology, and are encouraged by the progress we've made
defending our intellectual property in these lawsuits," said Netlist
President and CEO, C.K. Hong. "We
will continue to vigorously defend our IP, uncovering any and all theft of our
technology and infringement of our patents, and will not allow others to profit
from this unlawful activity."
in its 8-K last December, Netlist says it received a whistleblower letter
describing in detail how Diablo "stole Netlist's detailed architecture and
design" of its flagship product, HyperCloud, to create the ULLtraDIMM.
comments:- SanDisk's ULLtraDIMM is a
new class of
product in which cheap high capacity
MLC flash emulates many
DRAMs in a module which
contains little or no DRAM itself but which nevertheless plugs into a DDR3
In contrast - Netlist's "similar sounding but very
different" product families include real DRAMs which accomplish power
fail data protection aka non volatility - by means of fast backup and
restore to onboard flash - all in the same DDR3 module.
doesn't appear to be saying that it could design a product like the ULLtraDIMM -
because it doesn't to my knowledge have the
controller IP to do anything remotely similar.
Instead - what
Netlist appears to be saying is that techniques in DDR3 design - which enable
lots of circuitry to be placed behind a RAM interface - without placing too
much load on it and slowing it down - which Netlist has itself patented - are
suspected to have been used within the design of the ULLtraDIMM.
Diablo appoints new VP Engineering to advance Memory Channel
Editor:- January 23, 2014 - Diablo Technologies
the appointment of Jim
Miller as the company's new VP Engineering - in which rolse he will be
responsible for advancing the company's
Storage roadmap and engineering accomplishments. See also:-
Avago acquires LSI
Editor:- December 16, 2013 - LSI today
that it has agreed to be acquired by Avago
Technologies Limited in an all-cash transaction valued at $6.6
Editor's comments:- I hadn't heard of Avago before.
But I had heard of Agilent Technologies - the former name of this company -
which was a spinoff from HP. Avago was a semiconductor spinoff from Agilent.
Part of Avago's rationale (they're a semiconductor company with over 1/2 their
business in wireless technology) is to get into the enterprise storage market
and become a leader in this market "overnight".
A big chunk of the investment - about $1 billion is coming from
Silver Lake - a
VC company - which a
few years ago reintegrated another company in the SSD market -
SMART. The rest of
the funding is coming from bank loans.
MOSAID resumes the conversation about HLNAND
September 23, 2013 - Growing market demands for capacity and performance in
the enterprise SSD market is highlighting the intrinsic weaknesses in standard
flash memory interfaces.
That's the theme of a recent blog -
HyperLink NAND technology and scalability by Peter Gillingham, VP
and CTO Conversant
(the new name for MOSAID Technologies) who writes - "In the
space, where PCIe is
often used to connect storage hardware, SSDs require as many as 25 to 50
channels to provide the throughput demanded by the system interface... but even
2nd generation flash interfaces such as ONFi and toggle mode are not up to the
Editor's comments:- MOSAID - which will legally
its name to Conversant in January 2014 - first started talking about its
HLNAND architecture in
May 2007. But the
company - which recently changed its name - has been licensing its patents in
fast memory systems design since
Among the many reasons - why the company says its
simplifies the design of ultra high bandwidth scalable SSDs (pdf) are the
low loading on each device which means that latency is not degraded to the
same extent by capacitive bus load as in traditional memory topologies.
Seagate invests in eASIC
Editor:- August 5, 2013 -
it has got a strategic investment from Seagate.
has demonstrated innovative custom silicon technology with our... solid state
hybrid drives" said Rocky Pimentel,
chief sales and marketing officer at Seagate. "eASIC's ability to quickly
develop custom solutions while meeting stringent cost, power and performance
requirements will enable us to rapidly improve our product position in both
SSD and SSHDs."
Overview of PCIe topologies for enterprise SSDs
July 17, 2013 - PLX
Technology recently published a white paper -
and PCI Express - which gives an overview of past, current and future PCIe
SSD connection topologies along with a list of detailed reference articles.
interface chips and IP,
7 silos for enterprise
the challenges facing ULL SSDs
April 29, 2013 - StorageSearch.com today published
a new article -
Storage SSDs - will the new ultra low latency SSD concept fly? - should you
book a seat yet?
Hybrid Memory Cube spec ready for chip designers
April 3, 2013 - back in
October 2011 - I
reported on this page the formation of a new industry
ORG - the Hybrid Memory Cube Consortium
- which could have an impact on future SSD packaging densities.
takes a while to get these things going - but according to
press release this week by one of the founding companies - Micron - the 100 plus
companies which are collaborating in this enterprise have agreed on an
A key feature of the new multiplane memory
architecture is that distributed memory controllers in an HMC module will
handle the data I/O packet requests for the bunch of stacked memory chips in its
own vault. This is similar to the distributed intelligent data mover concept
which is already used in all proprietary
SSD controller designs - because it's the only way you can get good
aggregated global system performance while also dealing with low level
local memory management issues at low latency.
As with earlier
generations of remote distributed memory interfaces - such as
InfiniBand - HMC is
designed to optimize the request of small packets - which in the case of HMC is
16 to 128 bytes of data.
With today's semiconductor speeds -
accessing the data in those distributed memory chips within the same HMC module
presents similar technical problems to distributed memory cards in traditional
computer designs - because traversing inches of physical space at high speed is
as difficult as moving data across tens of feet at slower speeds.
has been born as a DRAM
technology - but don't ignore it - just for that reason. (Or because the data
packet sizes are small compared to the block sizes in
nand flash.) If and when
these HMC packaging ideas result in viable products - the ideas and
methodologies will spill into SSDs too -regardless of what the underlying
memories used in SSDs may be at that time.
It's all about speed and
scalability. According to the HMC
faqs page - A single (1st generation) HMC unit can provide more than 15x
the bandwidth of a DDR3 module. See also:-
SSD interface glue chips.
Crocus steers R&D efforts to simplify and accelerate
adoption of magnetically enhanced semiconductors
21, 2013 - Crocus
appointment of Dr.
Ken Mackay as VP of technology development in which role he will manage
and overview nano-magnetic materials research and CMOS teams - within the
company and in partner organizations - towards the goal of fully integrating
Crocus' magnetically enhanced semiconductor technology to the needs of
Proton gets funds to rejuvenate flash
February 7, 2013 - Proton
Digital Systems today announced
the completion of its $2 million seed round to support continued development
and expansion of its LDPC-based flash read channel IP products that increase
and longevity of
Proton's IP is currently licensed for enterprise and consumer applications and
has already been adopted by some of the world's largest flash memory companies.
and DSP IP in SSDs,
how to market flash
management care schemes for SSDs
Editor:- February 1, 2013 -
Is PCIe the Natural
Next-Generation Data Center Fabric?
That's what Larry Chisvin, VP of
strategic initiatives PLX
Technology believes and he'll try to convert you to his way of
thinking next week at
the Linley Tech Data
Center Conference in Santa Clara. PLX is the worldwide market leader in PCIe
enterprise SSD silos,
SSD glue chips.
Diablo sets up compatibility team for new SSD interface
Editor:- January 29, 2013 - Diablo Technologies
it has set a compatibility advisory team for its new SSD interface - which
the company is apparently positioning as a faster alternative to
we prepare to launch our line of Memory Channel Storage products that enable
next-generation enterprise server and storage system designs, we have set our
sights on unprecedented levels of performance for current and future
applications To that end, we have
a group of top industry innovators to help refine the development of our
revolutionary NAND-flash system solutions..." said Diablo's CTO - Maher Amer.
Cypress article re nvSRAMs in fast SSDs
November 5, 2012 - A
article in EETimes discusses the theoretical advantages of using nvSRAMs as
the RAM cache in enterprise
SSDs in the context of simplifying design for
sudden power loss.
The author Pramodh Prakash
Semiconductor describes how the company's
nvSRAMs transfer data in
a parallel cell by cell operation from run-time RAM to down-time SONOS in about
Back in September 2008 (in a comment which can still be seen in
the hybrid SSDs
page) I too speculated that this technology from Cypress might find uses in
fast flash SSDs.
Now I have doubts, however. And here are my reasons.
- Cypress's nvSRAMs still require hold up capacitors - to support the store
to nvm operation - although they don't need as much capacitance as DRAM
My guess is that this technology could still be
useful if it was integrated as a small part of an
SSD controller chip
(supporting the very low capacities needed by skinny designs) - but a lot of
fast enterprise SSD controllers are implemented by FPGAs or eASICs. FPGA makers
would have to preguess how much capacity to offer in their chips - because the
SONOS cells require a mask level design - not simply a firmware routing.
- Cypress's nvSRAMs offer memory capacity (16Mb sampling) which is too small
to be useful in any of the
RAM flash cache
SSD architectures I know about. Too big for skinny designs and too small for
the Future of Semiconductor Memory
September 18, 2012
- "Anybody can produce 100K chips, but it's a whole different beast to
produce 80 billion chips. Resistive, phase change, any technology - it's how to
make the transition from 100K to 80 billion" said Bill Gervasi,
Discobolous Designs in
a discussion at MemCon about the
manufacturability of new memory types such as RRAM, MRAM and PCM -
Future of Semiconductor Memory.
SSDs and USB 3
Editor:- June 13, 2012 -Does
my NAND flash need USB 3.0? - is a good summary of the value that USB 3
can bring to the SSD market - written by Eric Huang, at
BiTMICRO acquires mixed signal IP assets from QualCore
June 5, 2012 - BiTMICRO
obtained over 600 IP assets from QualCore
whose portfolio includes analog, digital, and mixed-signal IC design.
Engineers retained from QualCore's IP and ASIC services team have joined the
recently established BiTMICRO India. The acquisition also brings BiTMICRO
closer to its goal of bringing the entire development cycle in-house, from ASIC
design to characterization testing.
MOSAID samples high density fast flash modules for SSD makers
April 3, 2012 - MOSAID
that it is sampling a 16 die NAND flash stack integrated with its
HLNAND bridge interface
in a single 100-ball BGA measuring 18mm x 14mm - which provides 512GB raw
capacity and 667MB/s aggregate simultaneous R/W throughput as a building block
for use by SSD oems to build multi-terabyte SSDs with GB/s throughput by
adding their own SSD
MOSAID's VP of R&D - Jin-Ki Kim said
- "HLNAND's ring architecture allows a virtually unlimited number of NAND
die to be connected on a single channel without performance degradation."
Rambus gets into the nv memory IP market
February 6, 2012 -Rambus
it has acquired Unity
Semiconductor for an aggregate of $35 million in cash.
part of this acquisition, the Unity team members have joined Rambus to continue
developing innovations and solutions for next-generation
Intel buys InfiniBand line from QLogic
January 24, 2012 - Intel
an agreement to acquire the
40Gbps (pdf) related product lines, IP and business assets of QLogic.
Hybrid Memory Cube will enable Petabyte SSDs
October 7, 2011 - Samsung
and Micron this
week launched an new industry initiative - the Hybrid Memory Cube Consortium
- which will standardize a new module architecture for memory chips -
enabling greater density, faster bandwidth and lower power.
is unlike anything currently on the radar," said Robert Feurle,
Micron's VP for DRAM Marketing. "HMC brings a new level of capability to
memory that provides exponential performance and efficiency gains that will
redefine the future of memory."
OCZ nabs PLX team to speed new PCIe SSDs
October 5, 2011 - OCZ
has has agreed to acquire the
UK Design Team
(approximately 40 engineers located in Abingdon) and certain assets from PLX Technology which will
enable OCZ to accelerate the development of its next generation of SSDs -
while also reducing development costs.
Editor's comments:- in
addition to traditional storage interfaces - PLX's special focus in the past
year has been technologies related to faster
|Megabyte 's SSD glue was a
sticky paste of Phy IP, |
FPGA and ASIC granular chips stirred in a
trapping dielectric suspension and topped with a
quick setting, sweet tasting, firmware emulsifier.
|Who's got all the answers
to help understand how all the changes in the SSD market are coming together?
The answer is - no one and everyone and you too.|
|Advanced decoding schemes
employing soft decoding use the NAND statistics and soft information to
determine the most probable read signal that corresponds to the actual stored
data. This allows you to obtain readable data even when the memory cell is
severely degraded or there is a lot of 'noise' in cell data. |
|Adaptive R/W &
DSP ECC in flash SSDs|