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SSD history
what's the state of DWPD?
sauce for the SSD
box gander
sugaring
flash for the enterprise
animal brands in the
SSD market
Capacitor
hold up times in 2.5" military SSDs
latency reasons
for fading out DRAM in the virtual memory mix
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| a new
series about super fast computing |
Editor:- April 28, 2016 - The interaction of
design flows between memory, SSDcentric architecture,
processors,
storage and their impacts on what data based applications can accomplish and
realistically strive towards (in the directions of cost, performance and newly
viable ways of repurposing data) have been one of the perennial themes in
SSD history
in the modern era.
My attention was drawn to a new series -
What's
Missing in Supercomputing? - in the pages of the Next Platform which will look at
technical challenges related to the timeline of exaflop-capable systems.
NextPlatform.com's
co-editor Nicole
Hemsoth says the new series will cover the 4 challenges in technical
deep dives with key stakeholders.
I look forward to reading it. ...read
the article
One of the documents linked in that article -PathForward
Meeting update (pdf) by the Exascale
Initiative comments on the memory and storage challenge in these words...
"Memory and storage architectures must enable applications to access/store
information at high capacities and with low latencies to support anticipated
computational rates." | | |
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| "Storage
doesn't just provide capacity..." |
Jason
Doyle, IBM
in his recent linkedin blog -
Think
Storage First, Not Servers April 15, 2016.
Editor's comments:- I
told Jason I agree with him about the relative importance and nature of storage
not being commonly enough appreciated.
Like mass and energy in physics
- server CPUs and SSD storage head counts are interchangeable in black box
observations of apps and data.
This is a market paradigm with market
disrupting effects which I called attention to in
2003 and is what I
nowadays refer to as the "SSD-CPU equivalence" driver of SSD market
adoption.
More recently (in
2015) the
list of user
value propositions for adopting SSDcentric infrasture grew to 6 core ideas
with the addition of replacing swathes of enterprise DRAM with cheaper, higher
density flash and other (long
time emerging) alt nvms.
This DIMM
wars phenomenon in some aspects looks like a new DRAM-flash equivalence
proposition for latency filtered tiers within complex DRAM installations.
While this "market surge" aspect is new - its technology
is rooted in classical
ideas about virtualizing RAM with mixed memory and storage types with
the new market twist simply being the credibility of semiconductor memory
roadmaps having sufficiently distinct cost/density characteristics combined
with the confidence of existing massive SSD installed infrastructures to make
it worthwhile supporting multiple memory chip types with investments in
software. | | |
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| "The need for
reviving the SSD bookmarks
series concept after a 5 year gap is because while we're all busily dodging
tornadoes in Kansas to get to a consolidated market there's a lot of dust
making it harder than ever to see what's what."
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| Zsolt Kerekes,
editor - StorageSearch.com
in an email (April 2016) to Woody Hutsell,
Technologist, Evangelist - IBM - whom he was inviting
to suggest IBM related
links for the
series.
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smoking data wipe-out video
 Editor:-
April 29, 2016 - Usually the last thing you want to see as an SSD designer is
your hot new product going up in smoke - but autonomous self destruct of SSD
data takes many forms and this is one of them.
A new
video
from Renice Technology
shows a verification test rig for this functionality. Renice says it
uses a specially designed electric circuit, which ensures that all NAND flash
chips in the SSD will be burned through.
Editor's comments:- I've asked Renice if they've analyzed the
composition of the smoke - but this kind of
fast purge is aimed
at military
applications rather than civilian offices - so smoke fumes are the lesser of
two evils (compared to data capture by a foe). I've asked Renice to say how much
electrical energy is needed to complete the data burn and will post an update
here when I know. ...watch
the video
See also:- Just a few SSD videos
Revisiting Virtual Memory - read the book
Editor:-
April 25, 2016 - One of the documents I've spent a great deal of time reading
recently is
Revisiting
Virtual Memory (pdf) - a PhD thesis written by Arkaprava Basu
a researcher at AMD.
My
search for such a document began when I was looking for examples of raw DRAM
cache performance data to cite in my blog -
latency
loving reasons for fading out DRAM in the virtual memory slider mix. It was
about a month after publishing my blog that I came across Arkaprava's "book"
which not only satisfied my original information gaps but also serves other
educational needs too.
You can treat the first 1/3 or so as a modern
refresher for DRAM architecture which also introduces the reader to several
various philosophies related to DRAM system design (optimization for power
consumption rather than latency for example) and the work includes detailed
analysis of the relevance and efficiency of traditional cache techniques within
the context of large in-memory based applications. ...read
the book (pdf)
news bolts re consumer flash
Editor:-
April 25, 2016 - Market
researchers have long been telling us that the
consumer market is
the biggest user of flash.
3 of the biggest companies in that context have featured in news stories
recently.
- A report in etnews.com
says it expects Samsung
to resume supplies of flash to Apple after a 4 year
break (a period when the companies' relationships were soured by expensive
litigation about design isues relating to the phone market.)
- SanDisk
has
launched
a new external flash memory expander for users of Apple's iphones.
Editor's
comments:- I was curious about the mention of both Lightning and USB
connectors in SanDisk's iXpand Flash Drive (as from the headline I had
anticipated a wireless connect) so I looked at the photo on the
product
page. The appearance of its ingeneous curling mechanical design reminds
me somewhat of a child's party
horm blower. See if you agree.
If it becomes fashionable for phone
users to start adding custom tail fins and bulges to their clutchable devices
then maybe we can expect to see a new phone-compatible line of
Duck tape too.
new digest of data noise reduction techniques in nvm
Editor:-
April 22, 2016 - A recently published book -
Channel Coding
Methods for Non-Volatile Memories (145 pages, $130) cowritten by Lara Dolecek
and Frederic Sala
University of California, provides an overview of recent developments in
coding for nvms, and, by presenting numerous potential research directions, may
inspire other researchers to contribute to this timely and thriving discipline.
Editor's
comments:- this appears to be focused on the DSP and ECC end of the
Adaptive R/W
flash care management & DSP IP revolution which during the last 4 years
or so has been changing the way that new
memory technologies with
poor intrinsic data integrity (high noisiness - when viewed from a classical
ECC data angle) can be upcycled to construct higher quality, more reliable
solid state storage by adaptive and interventionist coding strategies.
pictures at an exhibition - Longsys (at IDF)
Editor:-
April 21, 2016 - Longsys
today posted pictures and
news about
some of its
SSD products
shown at the recent IDF
in Shenzhen, China. Among other things these products included:-
- FORESEE S400 series SSD - a dram-less (skinny) 2D TLC
SSD
- FORESEE P800 series SSD - an NVMe 1.2 HMB SSD family which is said to have
identical pricing to SATA SSDs
Everspin promises Gb MRAM later this year
Editor:-
April 14, 2016 - Everspin
Technologies recently
announced
it's shipping 256Mb ST-MRAM samples to global customers and plans to sample
1Gb products later this year.
Everspin says its 256Mb ST-MRAM product
breaks the record for the highest density commercial MRAM currently available in
the market.
Editor's comments:- One of the key questions with
MRAM's viability has always been - how does its denisty scaling compare with
flash? - given that it started behind the curve and can't afford to lose
comparative ground - if it is to get anywhere.
6 years ago (in
April 2010)
Everspin was sampling a 16Mb MRAM.
Now - 6 years later - the sampling
state of the art is 256Mb. That's 16x more density in 6 years. So you
can judge this for yourself.
Samsung
ships 10nm DRAM
Editor:- April 2, 2016 - Samsung
announced
today that it has begun mass producing the industry's first 10nm class 8Gb DDR4
DRAM chips.
The new cell geometries will enable peak transfer rates
which are about 30% faster than earlier 20nm DRAM.
RunCore brand completes transitions to V&G
Editor:- April 2, 2016 - Last year the
branding picture for RunCore
was confusing because they were using different brand names for the company in
different geographical regions - with upto 3 names being used concurrently on
different web sites.
The situation has now clarified with the
announcement
that the definitive name from April 1 is V&G (which in English you can think
of as "Vision and Goal" and in Chinese is Wei Gu.
V&G
is in effect the new name for RunCore. The company's leadership is the same as
before - the CEO is Jack
Wu who founded RunCore in 2007. And the company says the SSD product
lines are 100% technically identical - apart from the change in branding. | |
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| what were
the big SSD ideas which emerged in 2016? |
"As 3D NAND gets designed
into all upcoming products we see everybody trying to manipulate and
characterize the flash at a low level in ways that they did not all need to do
before, partly because LDPC is required just to meet the specified endurance.
This is delaying roll-out for many because they either do not have the required
flash skills or they (other than our customers) do not have access to a tool for
automatically characterizing the flash and generating the LLR tables."
Pearse Coyle, CEO - NVMdurance | | |
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| Why can't SSD's most ardent
believers agree on a single shared vision for the future of solid state
storage? |
| the SSD Heresies | | |
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DRAM's
indeterminate latencies
and the virtual memory mix slider |
Editor:- in a
new blog
on StorageSearch.com I
cast an eye on the latency specific defects in DRAM system behavior which
are among the many technology enablers of the emerging tiered memory /
flash as RAM market.
We've been accustomed to think of DRAM as the
simple predictable latency memory (compared to
flash). But server
motherboard memory system latency hasn't improved for over 10 years. Memory
systems got bigger and bandwidth got faster but worst case latencies can
sometimes be worse than they used to be - due to interference effects caused
by complex data queuing patterns.
If you haven't noticed these
problems - congratulations!
It means you might not notice (or care)
when the virtual memory slider moves in the cheaper direction towards
memories like flash. ...read the
article | | |
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